From patchwork Tue Nov 19 17:29:30 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Velenko X-Patchwork-Id: 292511 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 31B372C00E9 for ; Wed, 20 Nov 2013 04:30:32 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=R7jKpGmbgaym16WiDDl0V6fmz3GtuO4sbKp/ViOBA/z 9VDaN/OKg2RyNIIodrDW/wNyJK6B8VmFHy89BCWIuu8yhnPqTo9ZTWdxZ/3Pd17v EfgMWsGTrR0UAhJVyz7VyfN4BBchyKfHBU+FrDLdMEoSfSXRpyICYJj9vuDAA+0A = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=ZQgEOJOwRmZDVtRfFzBErOWmYOw=; b=nYzDA3HCsqJS74KaX DXCl2BQNH016f5RBZpQvAFTe8rcKOMUkuTH85qj12Ogn9XSMih9Z50PbivJ6/Z8c vV3Iz/WxBjXROUGoM831UcO1bRcXZJTImuioBLzWc6m+czAkR7mrz6JmaL4HXMvC AjS8tGzfv8wl0JKSPMQ+FIpBjY= Received: (qmail 7438 invoked by alias); 19 Nov 2013 17:30:21 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 7425 invoked by uid 89); 19 Nov 2013 17:30:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=AWL, BAYES_50, RDNS_NONE, SPF_PASS, URIBL_BLOCKED autolearn=no version=3.3.2 X-HELO: cam-smtp0.cambridge.arm.com Received: from Unknown (HELO cam-smtp0.cambridge.arm.com) (217.140.96.21) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Tue, 19 Nov 2013 17:29:40 +0000 Received: from [10.1.207.145] (e104458-lin.cambridge.arm.com [10.1.207.145]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id rAJHTUR8021527; Tue, 19 Nov 2013 17:29:30 GMT Message-ID: <528B9FFA.30304@arm.com> Date: Tue, 19 Nov 2013 17:29:30 +0000 From: Alex Velenko User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130804 Thunderbird/17.0.8 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" CC: Marcus.Shawcroft@arm.com Subject: [PATCH][AArch64] vneg testcase made big-endian safe X-IsSubscribed: yes Hi, This patch makes testcase for vneg[q]_s[8,16,32,64] big-endian safe. vneg_s.c testcase ran with both big and little endian compilers with no problems. is patch OK? Thanks, Alex gcc/testsuite/ 2013-11-19 Alex Velenko * gcc.target/aarch64/vneg_s.c (test_vneg_s8): fixed to not use vector indexing. (test_vneg_s16): Likewise. (test_vneg_s32): Likewise. (test_vneg_s64): Likewise. (test_vnegq_s8): Likewise. (test_vnegq_s16): Likewise. (test_vnegq_s32): Likewise. (test_vnegq_s64): Likewise. diff --git a/gcc/testsuite/gcc.target/aarch64/vneg_s.c b/gcc/testsuite/gcc.target/aarch64/vneg_s.c index accbf14074b9f9569f7e3662b6571075421f6a27..ac7dd6d87d66b8e192edf0d58ead3952ddb2de43 100644 --- a/gcc/testsuite/gcc.target/aarch64/vneg_s.c +++ b/gcc/testsuite/gcc.target/aarch64/vneg_s.c @@ -35,17 +35,11 @@ extern void abort (void); #define REG_INFEX(reg_len) REG_INFEX##reg_len #define POSTFIX(reg_len, data_len) \ CONCAT1 (REG_INFEX (reg_len), s##data_len) +#define LANE_POSTFIX(reg_len, data_len) \ + CONCAT1 (REG_INFEX (reg_len),lane_s##data_len) #define DATA_TYPE_32 float #define DATA_TYPE_64 double #define DATA_TYPE(data_len) DATA_TYPE_##data_len -#define INDEX64_8 [i] -#define INDEX64_16 [i] -#define INDEX64_32 [i] -#define INDEX64_64 -#define INDEX128_8 [i] -#define INDEX128_16 [i] -#define INDEX128_32 [i] -#define INDEX128_64 [i] #define FORCE_SIMD_INST64_8(data) #define FORCE_SIMD_INST64_16(data) @@ -56,8 +50,8 @@ extern void abort (void); #define FORCE_SIMD_INST128_32(data) #define FORCE_SIMD_INST128_64(data) -#define INDEX(reg_len, data_len) \ - CONCAT1 (INDEX, reg_len##_##data_len) +#define GET_ELEMENT(reg_len, data_len) \ + CONCAT1 (vget, LANE_POSTFIX (reg_len, data_len)) #define FORCE_SIMD_INST(reg_len, data_len, data) \ CONCAT1 (FORCE_SIMD_INST, reg_len##_##data_len) (data) #define LOAD_INST(reg_len, data_len) \ @@ -65,29 +59,31 @@ extern void abort (void); #define NEG_INST(reg_len, data_len) \ CONCAT1 (vneg, POSTFIX (reg_len, data_len)) -#define RUN_TEST(test_set, answ_set, reg_len, data_len, n, a, b) \ - { \ - int i; \ - INHIB_OPTIMIZATION; \ - (a) = LOAD_INST (reg_len, data_len) (test_set); \ - (b) = LOAD_INST (reg_len, data_len) (answ_set); \ - FORCE_SIMD_INST (reg_len, data_len, a) \ - a = NEG_INST (reg_len, data_len) (a); \ - FORCE_SIMD_INST (reg_len, data_len, a) \ - for (i = 0; i < n; i++) \ - { \ - INHIB_OPTIMIZATION; \ - if (a INDEX (reg_len, data_len) \ - != b INDEX (reg_len, data_len)) \ - return 1; \ - } \ - } +#define RUN_TEST(test_set, answ_set, reg_len, \ + data_len, n, a, b, _a, _b) \ +{ \ + int i; \ + INHIB_OPTIMIZATION; \ + (a) = LOAD_INST (reg_len, data_len) (test_set); \ + (b) = LOAD_INST (reg_len, data_len) (answ_set); \ + FORCE_SIMD_INST (reg_len, data_len, a) \ + a = NEG_INST (reg_len, data_len) (a); \ + FORCE_SIMD_INST (reg_len, data_len, a) \ + for (i = 0; i < n; i++) \ + { \ + INHIB_OPTIMIZATION; \ + _a = GET_ELEMENT (reg_len, data_len) (a, i); \ + _b = GET_ELEMENT (reg_len, data_len) (b, i); \ + if (_a != _b) \ + return 1; \ + } \ +} int test_vneg_s8 () { - int8x8_t a; - int8x8_t b; + int8x8_t a, b; + int8_t _a, _b; int8_t test_set0[8] = { TEST0, TEST1, TEST2, TEST3, TEST4, TEST5, SCHAR_MAX, SCHAR_MIN @@ -96,7 +92,7 @@ test_vneg_s8 () ANSW0, ANSW1, ANSW2, ANSW3, ANSW4, ANSW5, SCHAR_MIN + 1, SCHAR_MIN }; - RUN_TEST (test_set0, answ_set0, 64, 8, 8, a, b); + RUN_TEST (test_set0, answ_set0, 64, 8, 8, a, b, _a, _b); return 0; } @@ -106,8 +102,8 @@ test_vneg_s8 () int test_vneg_s16 () { - int16x4_t a; - int16x4_t b; + int16x4_t a, b; + int16_t _a,_b; int16_t test_set0[4] = { TEST0, TEST1, TEST2, TEST3 }; int16_t test_set1[4] = { TEST4, TEST5, SHRT_MAX, SHRT_MIN }; @@ -115,8 +111,8 @@ test_vneg_s16 () int16_t answ_set0[4] = { ANSW0, ANSW1, ANSW2, ANSW3 }; int16_t answ_set1[4] = { ANSW4, ANSW5, SHRT_MIN + 1, SHRT_MIN }; - RUN_TEST (test_set0, answ_set0, 64, 16, 4, a, b); - RUN_TEST (test_set1, answ_set1, 64, 16, 4, a, b); + RUN_TEST (test_set0, answ_set0, 64, 16, 4, a, b, _a, _b); + RUN_TEST (test_set1, answ_set1, 64, 16, 4, a, b, _a, _b); return 0; } @@ -126,8 +122,8 @@ test_vneg_s16 () int test_vneg_s32 () { - int32x2_t a; - int32x2_t b; + int32x2_t a, b; + int32_t _a, _b; int32_t test_set0[2] = { TEST0, TEST1 }; int32_t test_set1[2] = { TEST2, TEST3 }; @@ -139,10 +135,10 @@ test_vneg_s32 () int32_t answ_set2[2] = { ANSW4, ANSW5 }; int32_t answ_set3[2] = { INT_MIN + 1, INT_MIN }; - RUN_TEST (test_set0, answ_set0, 64, 32, 2, a, b); - RUN_TEST (test_set1, answ_set1, 64, 32, 2, a, b); - RUN_TEST (test_set2, answ_set2, 64, 32, 2, a, b); - RUN_TEST (test_set3, answ_set3, 64, 32, 2, a, b); + RUN_TEST (test_set0, answ_set0, 64, 32, 2, a, b, _a, _b); + RUN_TEST (test_set1, answ_set1, 64, 32, 2, a, b, _a, _b); + RUN_TEST (test_set2, answ_set2, 64, 32, 2, a, b, _a, _b); + RUN_TEST (test_set3, answ_set3, 64, 32, 2, a, b, _a, _b); return 0; } @@ -152,8 +148,8 @@ test_vneg_s32 () int test_vneg_s64 () { - int64x1_t a; - int64x1_t b; + int64x1_t a, b; + int64x1_t _a, _b; int64_t test_set0[1] = { TEST0 }; int64_t test_set1[1] = { TEST1 }; @@ -173,14 +169,14 @@ test_vneg_s64 () int64_t answ_set6[1] = { LLONG_MIN + 1 }; int64_t answ_set7[1] = { LLONG_MIN }; - RUN_TEST (test_set0, answ_set0, 64, 64, 1, a, b); - RUN_TEST (test_set1, answ_set1, 64, 64, 1, a, b); - RUN_TEST (test_set2, answ_set2, 64, 64, 1, a, b); - RUN_TEST (test_set3, answ_set3, 64, 64, 1, a, b); - RUN_TEST (test_set4, answ_set4, 64, 64, 1, a, b); - RUN_TEST (test_set5, answ_set5, 64, 64, 1, a, b); - RUN_TEST (test_set6, answ_set6, 64, 64, 1, a, b); - RUN_TEST (test_set7, answ_set7, 64, 64, 1, a, b); + RUN_TEST (test_set0, answ_set0, 64, 64, 1, a, b, _a, _b); + RUN_TEST (test_set1, answ_set1, 64, 64, 1, a, b, _a, _b); + RUN_TEST (test_set2, answ_set2, 64, 64, 1, a, b, _a, _b); + RUN_TEST (test_set3, answ_set3, 64, 64, 1, a, b, _a, _b); + RUN_TEST (test_set4, answ_set4, 64, 64, 1, a, b, _a, _b); + RUN_TEST (test_set5, answ_set5, 64, 64, 1, a, b, _a, _b); + RUN_TEST (test_set6, answ_set6, 64, 64, 1, a, b, _a, _b); + RUN_TEST (test_set7, answ_set7, 64, 64, 1, a, b, _a, _b); return 0; } @@ -190,8 +186,8 @@ test_vneg_s64 () int test_vnegq_s8 () { - int8x16_t a; - int8x16_t b; + int8x16_t a, b; + int8_t _a, _b; int8_t test_set0[16] = { TEST0, TEST1, TEST2, TEST3, TEST4, TEST5, SCHAR_MAX, SCHAR_MIN, @@ -203,7 +199,7 @@ test_vnegq_s8 () -4, -8, -15, -16, -23, -42, 1, 2 }; - RUN_TEST (test_set0, answ_set0, 128, 8, 8, a, b); + RUN_TEST (test_set0, answ_set0, 128, 8, 8, a, b, _a, _b); return 0; } @@ -213,8 +209,8 @@ test_vnegq_s8 () int test_vnegq_s16 () { - int16x8_t a; - int16x8_t b; + int16x8_t a, b; + int16_t _a, _b; int16_t test_set0[8] = { TEST0, TEST1, TEST2, TEST3, TEST4, TEST5, SHRT_MAX, SHRT_MIN @@ -223,7 +219,7 @@ test_vnegq_s16 () ANSW0, ANSW1, ANSW2, ANSW3, ANSW4, ANSW5, SHRT_MIN + 1, SHRT_MIN }; - RUN_TEST (test_set0, answ_set0, 128, 16, 8, a, b); + RUN_TEST (test_set0, answ_set0, 128, 16, 8, a, b, _a, _b); return 0; } @@ -233,8 +229,8 @@ test_vnegq_s16 () int test_vnegq_s32 () { - int32x4_t a; - int32x4_t b; + int32x4_t a, b; + int32_t _a, _b; int32_t test_set0[4] = { TEST0, TEST1, TEST2, TEST3 }; int32_t test_set1[4] = { TEST4, TEST5, INT_MAX, INT_MIN }; @@ -242,8 +238,8 @@ test_vnegq_s32 () int32_t answ_set0[4] = { ANSW0, ANSW1, ANSW2, ANSW3 }; int32_t answ_set1[4] = { ANSW4, ANSW5, INT_MIN + 1, INT_MIN }; - RUN_TEST (test_set0, answ_set0, 128, 32, 4, a, b); - RUN_TEST (test_set1, answ_set1, 128, 32, 4, a, b); + RUN_TEST (test_set0, answ_set0, 128, 32, 4, a, b, _a, _b); + RUN_TEST (test_set1, answ_set1, 128, 32, 4, a, b, _a, _b); return 0; } @@ -253,8 +249,8 @@ test_vnegq_s32 () int test_vnegq_s64 () { - int64x2_t a; - int64x2_t b; + int64x2_t a, b; + int64_t _a, _b; int64_t test_set0[2] = { TEST0, TEST1 }; int64_t test_set1[2] = { TEST2, TEST3 }; @@ -266,10 +262,10 @@ test_vnegq_s64 () int64_t answ_set2[2] = { ANSW4, ANSW5 }; int64_t answ_set3[2] = { LLONG_MIN + 1, LLONG_MIN }; - RUN_TEST (test_set0, answ_set0, 128, 64, 2, a, b); - RUN_TEST (test_set1, answ_set1, 128, 64, 2, a, b); - RUN_TEST (test_set2, answ_set2, 128, 64, 2, a, b); - RUN_TEST (test_set3, answ_set3, 128, 64, 2, a, b); + RUN_TEST (test_set0, answ_set0, 128, 64, 2, a, b, _a, _b); + RUN_TEST (test_set1, answ_set1, 128, 64, 2, a, b, _a, _b); + RUN_TEST (test_set2, answ_set2, 128, 64, 2, a, b, _a, _b); + RUN_TEST (test_set3, answ_set3, 128, 64, 2, a, b, _a, _b); return 0; }