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[AARCH64] Implement vector alignment target hooks.

Message ID 50B63D0A.9030203@arm.com
State New
Headers show

Commit Message

Tejas Belagod Nov. 28, 2012, 4:34 p.m. UTC 
Hi,

The attached patch implements vector alignment hooks

TARGET_VECTOR_ALIGNMENT
TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE
TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT

Regression tested on aarch64-none-elf. OK for aarch64-4.7 and trunk?

Thanks,
Tejas Belagod.
ARM.

Changelog:

2012-11-28  Tejas Belagod  <tejas.belagod@arm.com>

gcc/
	* config/aarch64/aarch64.c (aarch64_simd_vector_alignment,
	aarch64_simd_vector_alignment_reachable): New.
	(TARGET_VECTOR_ALIGNMENT, TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE):
	Define.

Comments

Marcus Shawcroft Nov. 30, 2012, 9:02 a.m. UTC | #1 
On 28/11/12 16:34, Tejas Belagod wrote:
>
> Hi,
>
> The attached patch implements vector alignment hooks
>
> TARGET_VECTOR_ALIGNMENT
> TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE
> TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT
>
> Regression tested on aarch64-none-elf. OK for aarch64-4.7 and trunk?

OK provided it was regression tested on both.
/Marcus
diff mbox

Patch

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index b36be90..9bf6a13 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -6691,6 +6691,31 @@  aarch64_simd_attr_length_move (rtx insn)
   return 4;
 }
 
+/* Implement target hook TARGET_VECTOR_ALIGNMENT.  The AAPCS64 sets the maximum
+   alignment of a vector to 128 bits.  */
+static HOST_WIDE_INT
+aarch64_simd_vector_alignment (const_tree type)
+{
+  HOST_WIDE_INT align = tree_low_cst (TYPE_SIZE (type), 0);
+  return MIN (align, 128);
+}
+
+/* Implement target hook TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE.  */
+static bool
+aarch64_simd_vector_alignment_reachable (const_tree type, bool is_packed)
+{
+  if (is_packed)
+    return false;
+
+  /* We guarantee alignment for vectors up to 128-bits.  */
+  if (tree_int_cst_compare (TYPE_SIZE (type),
+			    bitsize_int (BIGGEST_ALIGNMENT)) > 0)
+    return false;
+
+  /* Vectors whose size is <= BIGGEST_ALIGNMENT are naturally aligned.  */
+  return true;
+}
+
 static unsigned HOST_WIDE_INT
 aarch64_shift_truncation_mask (enum machine_mode mode)
 {
@@ -6988,6 +7013,13 @@  aarch64_c_mode_for_suffix (char suffix)
 #undef TARGET_VECTORIZE_PREFERRED_SIMD_MODE
 #define TARGET_VECTORIZE_PREFERRED_SIMD_MODE aarch64_preferred_simd_mode
 
+#undef TARGET_VECTOR_ALIGNMENT
+#define TARGET_VECTOR_ALIGNMENT aarch64_simd_vector_alignment
+
+#undef TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE
+#define TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE \
+  aarch64_simd_vector_alignment_reachable
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 #include "gt-aarch64.h"