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RFA: patch to fix PR19398

Message ID 50A98F1E.4000002@redhat.com
State New
Headers show

Commit Message

Vladimir Makarov Nov. 19, 2012, 1:45 a.m. UTC 
The following patch fixes

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19398

Uros, there is i386.md part for which I need an approval.  Without this 
change, GCC will still generate the same code even if LRA uses an 
alternative with 'm' constraint.

2012-11-18  Vladimir Makarov  <vmakarov@redhat.com>

         PR target/19398
         * lra-constraints.c (process_alt_operands): Discourage reloads
         through secodnary memory.
         * config/i386/i386.md (fix_trunc?f?i_sse): Remove peephole2
         patterns.

Comments

Uros Bizjak Nov. 19, 2012, 7:55 a.m. UTC | #1 
On Mon, Nov 19, 2012 at 2:45 AM, Vladimir Makarov <vmakarov@redhat.com> wrote:
> The following patch fixes
>
> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19398
>
> Uros, there is i386.md part for which I need an approval.  Without this
> change, GCC will still generate the same code even if LRA uses an
> alternative with 'm' constraint.
>
> 2012-11-18  Vladimir Makarov  <vmakarov@redhat.com>
>
>         PR target/19398
>         * lra-constraints.c (process_alt_operands): Discourage reloads
>         through secodnary memory.
>         * config/i386/i386.md (fix_trunc?f?i_sse): Remove peephole2
>         patterns.

Thanks!

Please note that i386.md change is not correct, it is peephole2 with
"Shorten x87->SSE reload sequences ..." comment that is not effective
anymore with your patch and should now be removed. The peephole2s that
your patch removes undo LRA transformation for targets that *do not*
benefit from MEM->REG operation for this particular FIX RTX. (Also,
please note that your patch includes movti_internal_rex64 change that
was already reverted due to better fix).

Please remove mentioned peephole2 instead. The test from the PR will
show effects of LRA change for all targets, other than core2i7_64, k8
and generic 64bit targets.

The patch that removes mentioned peephole2 from i386.md is pre-approved.

Thanks,
Uros.


>
diff mbox

Patch

Index: lra-constraints.c
===================================================================
--- lra-constraints.c	(revision 193567)
+++ lra-constraints.c	(working copy)
@@ -1942,6 +1942,19 @@ 
 	      if (no_regs_p && REG_P (op))
 		reject++;
 
+#ifdef SECONDARY_MEMORY_NEEDED
+	      /* If reload requires moving value through secondary
+		 memory, it will need one more insn at least.  */
+	      if (this_alternative != NO_REGS 
+		  && REG_P (op) && (cl = get_reg_class (REGNO (op))) != NO_REGS
+		  && ((curr_static_id->operand[nop].type != OP_OUT
+		       && SECONDARY_MEMORY_NEEDED (cl, this_alternative,
+						   GET_MODE (op)))
+		      || (curr_static_id->operand[nop].type != OP_IN
+			  && SECONDARY_MEMORY_NEEDED (this_alternative, cl,
+						      GET_MODE (op)))))
+		losers++;
+#endif
 	      /* Input reloads can be inherited more often than output
 		 reloads can be removed, so penalize output
 		 reloads.  */
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md	(revision 193557)
+++ config/i386/i386.md	(working copy)
@@ -1875,7 +1875,7 @@ 
 	      (const_string "OI")))])
 
 (define_insn "*movti_internal_rex64"
-  [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,o  ,x,x ,m")
+  [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,!o  ,x,x ,m")
 	(match_operand:TI 1 "general_operand"      "riFo,riF,C,xm,x"))]
   "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
@@ -4503,23 +4503,6 @@ 
    && peep2_reg_dead_p (2, operands[0])"
   [(set (match_dup 2) (fix:SWI48x (match_dup 1)))])
 
-;; Avoid vector decoded forms of the instruction.
-(define_peephole2
-  [(match_scratch:DF 2 "x")
-   (set (match_operand:SWI48x 0 "register_operand")
-	(fix:SWI48x (match_operand:DF 1 "memory_operand")))]
-  "TARGET_SSE2 && TARGET_AVOID_VECTOR_DECODE && optimize_insn_for_speed_p ()"
-  [(set (match_dup 2) (match_dup 1))
-   (set (match_dup 0) (fix:SWI48x (match_dup 2)))])
-
-(define_peephole2
-  [(match_scratch:SF 2 "x")
-   (set (match_operand:SWI48x 0 "register_operand")
-	(fix:SWI48x (match_operand:SF 1 "memory_operand")))]
-  "TARGET_AVOID_VECTOR_DECODE && optimize_insn_for_speed_p ()"
-  [(set (match_dup 2) (match_dup 1))
-   (set (match_dup 0) (fix:SWI48x (match_dup 2)))])
-
 (define_insn_and_split "fix_trunc<mode>_fisttp_i387_1"
   [(set (match_operand:SWI248x 0 "nonimmediate_operand")
 	(fix:SWI248x (match_operand 1 "register_operand")))]