diff mbox

[ARM] Disable cstoredf4 for single precision VFP

Message ID 4C60DF03.7080609@codesourcery.com
State New
Headers show

Commit Message

Jie Zhang Aug. 10, 2010, 5:09 a.m. UTC 
When working on Cortex-M4, I got an ICE from GCC. This patch should fix 
it. Testing on Cortex-M4 board with "-mcpu=cortex-m4 -mfloat-abi=softfp 
-mfpu=fpv4-sp-d16" shows this patch fixes many FAILs.

Is it OK?


Regards,

Comments

Richard Earnshaw Aug. 12, 2010, 4:52 p.m. UTC | #1 
On Tue, 2010-08-10 at 13:09 +0800, Jie Zhang wrote:
> When working on Cortex-M4, I got an ICE from GCC. This patch should fix 
> it. Testing on Cortex-M4 board with "-mcpu=cortex-m4 -mfloat-abi=softfp 
> -mfpu=fpv4-sp-d16" shows this patch fixes many FAILs.
> 
> Is it OK?
> 
> 
> Regards,

OK.

R.
Jie Zhang Aug. 13, 2010, 1:44 a.m. UTC | #2 
On 08/13/2010 12:52 AM, Richard Earnshaw wrote:
>
> On Tue, 2010-08-10 at 13:09 +0800, Jie Zhang wrote:
>> When working on Cortex-M4, I got an ICE from GCC. This patch should fix
>> it. Testing on Cortex-M4 board with "-mcpu=cortex-m4 -mfloat-abi=softfp
>> -mfpu=fpv4-sp-d16" shows this patch fixes many FAILs.
>>
>> Is it OK?
>>
>>
>> Regards,
>
> OK.
>
Thanks. Committed on trunk.
diff mbox

Patch


	* config/arm/arm.md (cstoredf4): Only valid when
	!TARGET_VFP_SINGLE.

Index: config/arm/arm.md
===================================================================
--- config/arm/arm.md	(revision 163048)
+++ config/arm/arm.md	(working copy)
@@ -7417,7 +7417,7 @@ 
 	(match_operator:SI 1 "arm_comparison_operator"
 	 [(match_operand:DF 2 "s_register_operand" "")
 	  (match_operand:DF 3 "arm_float_compare_operand" "")]))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
   "emit_insn (gen_cstore_cc (operands[0], operands[1],
 			     operands[2], operands[3])); DONE;"
 )