From patchwork Fri Jul 9 21:54:02 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernd Schmidt X-Patchwork-Id: 58438 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id DE958B6F0C for ; Sat, 10 Jul 2010 07:55:25 +1000 (EST) Received: (qmail 6558 invoked by alias); 9 Jul 2010 21:55:23 -0000 Received: (qmail 6547 invoked by uid 22791); 9 Jul 2010 21:55:22 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL, BAYES_00, TW_QE, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 09 Jul 2010 21:55:15 +0000 Received: (qmail 7330 invoked from network); 9 Jul 2010 21:55:14 -0000 Received: from unknown (HELO ?84.152.250.175?) (bernds@127.0.0.2) by mail.codesourcery.com with ESMTPA; 9 Jul 2010 21:55:14 -0000 Message-ID: <4C379A7A.1020402@codesourcery.com> Date: Fri, 09 Jul 2010 23:54:02 +0200 From: Bernd Schmidt User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.1.10) Gecko/20100625 Thunderbird/3.0.5 MIME-Version: 1.0 To: GCC Patches CC: Richard Earnshaw Subject: Patch, committed: ARM fixes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org This patch fixes two problems introduced by some of my earlier changes. In addsi3_cbranch, I had changed alternative 2 to emit an extra move instruction like the higher-numbered alternatives, but forgot to update insn length calculations. In cbranchqi4, the array size was too small. Regression tested as usual with qemu-system-armv7/arch=armv7-a/thumb qemu-system-armv7/thumb qemu-system-armv7 and committed as obvious. Bernd Index: ChangeLog =================================================================== --- ChangeLog (revision 162021) +++ ChangeLog (working copy) @@ -13,6 +13,10 @@ * config/arm/arm.md (Thumb-1 ldrsb peephole): New. + * config/arm/arm.md (cbranchqi4): Fix array size. + (addsi3_cbranch): Also andle alternative 2 like alternative 3 when + calculating length. + 2010-07-09 Richard Guenther * gimple.c (struct type_fixup_s): New struct and VEC type. Index: config/arm/arm.md =================================================================== --- config/arm/arm.md (revision 162021) +++ config/arm/arm.md (working copy) @@ -6562,7 +6562,7 @@ (define_expand "cbranchqi4" (pc)))] "TARGET_THUMB1" { - rtx xops[3]; + rtx xops[4]; xops[1] = gen_reg_rtx (SImode); emit_insn (gen_zero_extendqisi2 (xops[1], operands[1])); xops[2] = GEN_INT (127); @@ -7509,7 +7509,7 @@ (define_insn "*addsi3_cbranch" else if (which_alternative >= 4) output_asm_insn (\"str\\t%1, %0\", operands); - switch (get_attr_length (insn) - ((which_alternative >= 3) ? 2 : 0)) + switch (get_attr_length (insn) - ((which_alternative >= 2) ? 2 : 0)) { case 4: return \"b%d4\\t%l5\"; @@ -7523,7 +7523,7 @@ (define_insn "*addsi3_cbranch" [(set (attr "far_jump") (if_then_else (ior (and (lt (symbol_ref ("which_alternative")) - (const_int 3)) + (const_int 2)) (eq_attr "length" "8")) (eq_attr "length" "10")) (const_string "yes") @@ -7531,7 +7531,7 @@ (define_insn "*addsi3_cbranch" (set (attr "length") (if_then_else (lt (symbol_ref ("which_alternative")) - (const_int 3)) + (const_int 2)) (if_then_else (and (ge (minus (match_dup 5) (pc)) (const_int -250)) (le (minus (match_dup 5) (pc)) (const_int 256)))