diff mbox series

[pushed] loongarch: exclude LARCH_PROLOGUE_TEMP from SIBCALL_REGS [PR 106096]

Message ID 43b50e50bfc031421951d9995ab3aabaabe9b739.camel@xry111.site
State New
Headers show
Series [pushed] loongarch: exclude LARCH_PROLOGUE_TEMP from SIBCALL_REGS [PR 106096] | expand

Commit Message

Xi Ruoyao June 28, 2022, 11:09 a.m. UTC
Pushed as r13-1319 and r12-8520.  Already approved by port maintainer at
bugzilla.

-- >8 --

The epilogue may clobber LARCH_PROLOGUE_TEMP ($r13/$t1), so it cannot be
used for sibcalls.

gcc/ChangeLog:

	PR target/106096
	* config/loongarch/loongarch.h (REG_CLASS_CONTENTS): Exclude
	$r13 from SIBCALL_REGS.
	* config/loongarch/loongarch.cc (loongarch_regno_to_class):
	Change $r13 to JIRL_REGS.

gcc/testsuite/ChangeLog:

	PR target/106096
	* g++.target/loongarch/loongarch.exp: New test support file.
	* g++.target/loongarch/pr106096.C: New test.
---
 gcc/config/loongarch/loongarch.cc             |  2 +-
 gcc/config/loongarch/loongarch.h              |  2 +-
 .../g++.target/loongarch/loongarch.exp        | 34 +++++++++
 gcc/testsuite/g++.target/loongarch/pr106096.C | 75 +++++++++++++++++++
 4 files changed, 111 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/g++.target/loongarch/loongarch.exp
 create mode 100644 gcc/testsuite/g++.target/loongarch/pr106096.C
diff mbox series

Patch

diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
index 80046b64006..c8502b0b0f3 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -189,7 +189,7 @@  const enum reg_class loongarch_regno_to_class[FIRST_PSEUDO_REGISTER] = {
     GR_REGS,	     GR_REGS,	      GR_REGS,	       GR_REGS,
     JIRL_REGS,       JIRL_REGS,       JIRL_REGS,       JIRL_REGS,
     JIRL_REGS,       JIRL_REGS,       JIRL_REGS,       JIRL_REGS,
-    SIBCALL_REGS,    SIBCALL_REGS,    SIBCALL_REGS,    SIBCALL_REGS,
+    SIBCALL_REGS,    JIRL_REGS,       SIBCALL_REGS,    SIBCALL_REGS,
     SIBCALL_REGS,    SIBCALL_REGS,    SIBCALL_REGS,    SIBCALL_REGS,
     SIBCALL_REGS,    GR_REGS,	      GR_REGS,	       JIRL_REGS,
     JIRL_REGS,       JIRL_REGS,       JIRL_REGS,       JIRL_REGS,
diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
index 4d107a42209..f9de9a6e4fb 100644
--- a/gcc/config/loongarch/loongarch.h
+++ b/gcc/config/loongarch/loongarch.h
@@ -511,7 +511,7 @@  enum reg_class
 #define REG_CLASS_CONTENTS						\
 {									\
   { 0x00000000, 0x00000000, 0x00000000 },	/* NO_REGS  */		\
-  { 0x001ff000, 0x00000000, 0x00000000 },	/* SIBCALL_REGS  */	\
+  { 0x001fd000, 0x00000000, 0x00000000 },	/* SIBCALL_REGS  */	\
   { 0xff9ffff0, 0x00000000, 0x00000000 },	/* JIRL_REGS  */	\
   { 0xfffffffc, 0x00000000, 0x00000000 },	/* CSR_REGS  */		\
   { 0xffffffff, 0x00000000, 0x00000000 },	/* GR_REGS  */		\
diff --git a/gcc/testsuite/g++.target/loongarch/loongarch.exp b/gcc/testsuite/g++.target/loongarch/loongarch.exp
new file mode 100644
index 00000000000..4fd1194a552
--- /dev/null
+++ b/gcc/testsuite/g++.target/loongarch/loongarch.exp
@@ -0,0 +1,34 @@ 
+# Copyright (C) 2019-2022 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't a LoongArch target.
+if ![istarget loongarch*-*-*] then {
+  return
+}
+
+# Load support procs.
+load_lib g++-dg.exp
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.C]] "" ""
+
+# All done.
+dg-finish
diff --git a/gcc/testsuite/g++.target/loongarch/pr106096.C b/gcc/testsuite/g++.target/loongarch/pr106096.C
new file mode 100644
index 00000000000..5edbda220f7
--- /dev/null
+++ b/gcc/testsuite/g++.target/loongarch/pr106096.C
@@ -0,0 +1,75 @@ 
+/* PR target/106096
+   Reduced from gimple-range-path.cc.  It was miscompiled with -O2 and
+   caused ICE (segfault) building stage 2 libgcc.  */
+
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+enum E
+{
+  TS_TYPED
+} a;
+int b, c;
+char d, e;
+
+__attribute__ ((cold, noipa, noinline)) void
+cold (int *, E, char *, int, char *)
+{
+  __builtin_trap ();
+}
+
+int *
+contains_struct_check (E x)
+{
+  if (a)
+    cold (&b, x, &d, c, &e);
+  return &b;
+}
+
+struct vrange
+{
+  virtual void set_varying (int *);
+};
+
+struct int_range : vrange
+{
+  int *m_ranges[510];
+};
+
+__attribute__ ((noipa, noinline)) void
+vrange::set_varying (int *)
+{
+}
+
+struct Value_Range
+{
+  Value_Range (int *);
+  int_range m_irange;
+};
+
+__attribute__ ((noipa, noinline)) Value_Range::Value_Range (int *) {}
+
+struct path_range_query
+{
+  void ssa_range_in_phi (vrange &);
+  bool m_resolve;
+};
+
+__attribute__ ((noipa, noinline)) void
+path_range_query::ssa_range_in_phi (vrange &r)
+{
+  if (m_resolve)
+    {
+      Value_Range (contains_struct_check (TS_TYPED));
+      return;
+    }
+  r.set_varying (contains_struct_check (TS_TYPED));
+}
+
+int
+main ()
+{
+  path_range_query prq{ 0 };
+  vrange vr;
+  prq.ssa_range_in_phi (vr);
+  return 0;
+}