@@ -2510,7 +2510,7 @@ RS6000_BUILTIN_X (RS6000_BUILTIN_SET_FPSCR_RN, "__builtin_set_fpscr_rn",
CODE_FOR_rs6000_set_fpscr_rn)
RS6000_BUILTIN_X (RS6000_BUILTIN_SET_FPSCR_DRN, "__builtin_set_fpscr_drn",
- RS6000_BTM_ALWAYS,
+ RS6000_BTM_DFP,
RS6000_BTC_MISC | RS6000_BTM_64BIT | RS6000_BTC_UNARY
| RS6000_BTC_VOID,
CODE_FOR_rs6000_set_fpscr_drn)
@@ -5849,7 +5849,7 @@ (define_insn "rs6000_mffscdrn"
[(set_attr "type" "fp")])
(define_expand "rs6000_set_fpscr_rn"
- [(match_operand 0 "reg_or_cint_operand")]
+ [(match_operand:DI 0 "reg_or_cint_operand")]
"TARGET_HARD_FLOAT"
{
rtx tmp_df = gen_reg_rtx (DFmode);
@@ -5858,9 +5858,8 @@ (define_expand "rs6000_set_fpscr_rn"
new rounding mode bits from operands[0][62:63] into FPSCR[62:63]. */
if (TARGET_P9_MISC)
{
- rtx src_df = gen_reg_rtx (DImode);
-
- src_df = simplify_gen_subreg (DFmode, operands[0], DImode, 0);
+ rtx src_df = force_reg (DImode, operands[0]);
+ src_df = simplify_gen_subreg (DFmode, src_df, DImode, 0);
emit_insn (gen_rs6000_mffscrn (tmp_df, src_df));
DONE;
}
@@ -1,9 +1,7 @@
/* { dg-do run { target { powerpc*-*-* && lp64 } } } */
-/* { dg-require-effective-target dfp_hw } */
+/* { dg-require-effective-target hard_dfp } */
/* { dg-options "-O2 -std=c99" } */
-#include <altivec.h>
-
#ifdef DEBUG
#include <stdio.h>
#endif
@@ -1,9 +1,7 @@
-/* { dg-do compile { target powerpc*-*-* } } */
-/* { dg-require-effective-target dfp_hw } */
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-require-effective-target hard_dfp } */
/* { dg-options "-O2 -std=c99" } */
-#include <altivec.h>
-
int main ()
{
@@ -1,8 +1,6 @@
/* { dg-do run { target { powerpc*-*-* } } } */
/* { dg-options "-O2 -std=c99" } */
-#include <altivec.h>
-
#ifdef DEBUG
#include <stdio.h>
#endif
@@ -1,8 +1,6 @@
/* { dg-do compile { target powerpc*-*-* } } */
/* { dg-options "-O2 -std=c99" } */
-#include <altivec.h>
-
int main ()
{
@@ -1,8 +1,6 @@
/* { dg-do run { target { powerpc*-*-* } } } */
/* { dg-options "-O2 -std=c99" } */
-#include <altivec.h>
-
#ifdef DEBUG
#include <stdio.h>
#endif