From patchwork Wed Oct 10 21:40:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier Hainque X-Patchwork-Id: 982116 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-487294-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=adacore.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="R80wQdIO"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42VnZp1Hg6z9s9J for ; Thu, 11 Oct 2018 08:40:31 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :content-type:mime-version:subject:message-id:date:cc:to; q=dns; s=default; b=mdKlRV64fWG14olbs4hjcjR8CwABtRKtC7jOMVe5C2/MRKdE3d Tq3t8WO5i2H+zOO3CWVV4lz3bGKAaHTVktX6sYqojPfDu7t/A2DTCda4bT4xHsuO AmAUH2nuqDS15wfUxWDv+u+1pA3S8tic9I2ACvCPDTo5f3O3DaCPgFixQ= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :content-type:mime-version:subject:message-id:date:cc:to; s= default; bh=AyajHKA6GXb5opIv0ej5lY4Ahws=; b=R80wQdIONXHLGIjBfCGg eN6JbB5dQbdvOej8pdpTmV73SEBocb1+1khxLWszKQlH+Y52aWyXUStqYIMMTWCK pW+rZJCwokw2vpORoBL2HWKhdjQKv9egdCwzyr90q5fZSC0+hX6qOy+SKuMfyS/4 UE00uAl5+EedMq7KZevCUlk= Received: (qmail 6132 invoked by alias); 10 Oct 2018 21:40:24 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 6121 invoked by uid 89); 10 Oct 2018 21:40:23 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=R23, r29, H*c:HHHHHHHH, H*c:HHHH X-HELO: smtp.eu.adacore.com Received: from mel.act-europe.fr (HELO smtp.eu.adacore.com) (194.98.77.210) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 10 Oct 2018 21:40:21 +0000 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id 521F581382; Wed, 10 Oct 2018 23:40:18 +0200 (CEST) Received: from smtp.eu.adacore.com ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bsAXaC-bc9iu; Wed, 10 Oct 2018 23:40:18 +0200 (CEST) Received: from private.gnat.com (unknown [IPv6:2620:20:4000:40:e086:1242:bc0a:e166]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.eu.adacore.com (Postfix) with ESMTPSA id DEFAC812FD; Wed, 10 Oct 2018 23:40:17 +0200 (CEST) From: Olivier Hainque Mime-Version: 1.0 (Mac OS X Mail 11.5 \(3445.9.1\)) Subject: [patch] allow target config to state r18 is fixed on aarch64 Message-Id: <3FA70C04-A7B3-4C74-AFF7-7BAC7C2C0DBC@adacore.com> Date: Wed, 10 Oct 2018 17:40:16 -0400 Cc: Olivier Hainque To: GCC Patches Hello, The aarch64 "platform register" r18 is currently unconditionally used as a scratch register by gcc. Working on a VxWorks port for this arch (that we plan to contribute soon), we discovered that VxWorks has an internal use of this register so it needs to be considered "fixed" for this port. Hence the attached patch proposal, which we have been using successfully for a while now. It just introduces a FIXED_R18 config macro, defaulted to 0, which an OS specific config file may redefine. Is this ok to commit ? Thanks in advance, With Kind Regards, Olivier 2018-03-18 Olivier Hainque * config/aarch64/aarch64.h (FIXED_R18): New internal configuration macro, defaulted to 0. (FIXED_REGISTERS): Use it. (STATIC_CHAIN_REGNUM): Fallback to r11 instead of r18 if the latter is fixed. diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index fa9af26..2e69a4d 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -284,11 +284,13 @@ extern unsigned aarch64_architecture_version; /* Standard register usage. */ +#define FIXED_R18 0 + /* 31 64-bit general purpose registers R0-R30: R30 LR (link register) R29 FP (frame pointer) R19-R28 Callee-saved registers - R18 The platform register; use as temporary register. + R18 The platform register; use as temporary register if !FIXED_R18. R17 IP1 The second intra-procedure-call temporary register (can be used by call veneers and PLT code); otherwise use as a temporary register @@ -324,7 +326,7 @@ extern unsigned aarch64_architecture_version; { \ 0, 0, 0, 0, 0, 0, 0, 0, /* R0 - R7 */ \ 0, 0, 0, 0, 0, 0, 0, 0, /* R8 - R15 */ \ - 0, 0, 0, 0, 0, 0, 0, 0, /* R16 - R23 */ \ + 0, 0, FIXED_R18, 0, 0, 0, 0, 0, /* R16 - R23 */ \ 0, 0, 0, 0, 0, 1, 0, 1, /* R24 - R30, SP */ \ 0, 0, 0, 0, 0, 0, 0, 0, /* V0 - V7 */ \ 0, 0, 0, 0, 0, 0, 0, 0, /* V8 - V15 */ \ @@ -419,7 +421,7 @@ extern unsigned aarch64_architecture_version; uses alloca. */ #define EXIT_IGNORE_STACK (cfun->calls_alloca) -#define STATIC_CHAIN_REGNUM R18_REGNUM +#define STATIC_CHAIN_REGNUM (!(FIXED_R18) ? R18_REGNUM : R11_REGNUM) #define HARD_FRAME_POINTER_REGNUM R29_REGNUM #define FRAME_POINTER_REGNUM SFP_REGNUM #define STACK_POINTER_REGNUM SP_REGNUM