From patchwork Fri Oct 5 17:41:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Koning X-Patchwork-Id: 979685 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-487039-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=comcast.net Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="uMik21gq"; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=comcast.net header.i=@comcast.net header.b="JS2Ekash"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42RcWJ30pCz9s3T for ; Sat, 6 Oct 2018 03:41:29 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :content-type:content-transfer-encoding:mime-version:subject :message-id:date:to; q=dns; s=default; b=uMuN940eMXDtNBzQqfYviBJ 2jv30Ylf3JWt+zjy+TFJw8Wia8DeaZ23Mve5xh6ZR0wNmi1lCD0ixWg2r3qjdBZy CpinXohTkyf4ahuqCBLJK3Q36v+Mz9i7GTE/VKaQA99kXTQPgMm+qNEQZW2O0mcM qtW19z7GN+ymps7IW5kg= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :content-type:content-transfer-encoding:mime-version:subject :message-id:date:to; s=default; bh=/HNQVcOjGLPdzWp+iiFzRmwDH7U=; b= uMik21gqx0NBta3KBLNq0XYPEjQGOS8Ymi2pfuF8VyBZR7hNIs5QQzT7Cu2DmdL4 5JewBssChwefzwOvQ01o2z7G5hRj7X0HIMaHzFcZo03zq8e054HBAhiXl1nxZY+Y 8GDl5k8ygHU1euKHaKW90VCRGiJI6hPkyajEiBc1CTo= Received: (qmail 118373 invoked by alias); 5 Oct 2018 17:41:22 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 118360 invoked by uid 89); 5 Oct 2018 17:41:22 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-15.1 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS, KAM_NUMSUBJECT, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy=switches, mfloat32, sk:DOUBLE_, PDP11 X-HELO: resqmta-po-09v.sys.comcast.net Received: from resqmta-po-09v.sys.comcast.net (HELO resqmta-po-09v.sys.comcast.net) (96.114.154.168) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 05 Oct 2018 17:41:20 +0000 Received: from resomta-po-19v.sys.comcast.net ([96.114.154.243]) by resqmta-po-09v.sys.comcast.net with ESMTP id 8Sm5gwO50w78x8U6Jgdmni; Fri, 05 Oct 2018 17:41:19 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=comcast.net; s=q20161114; t=1538761279; bh=NQBCDiMAaOkrw0USZrrtPeCPHUWuNUInXnpJ23HI5eo=; h=Received:Received:From:Content-Type:Mime-Version:Subject: Message-Id:Date:To; b=JS2EkashevYNXz2wOesBewvybELztaqrimexBsGnYQbkkfgcMZatBiJutR0hTxNim y7Dv2LQ6y3rB/hWaOpokabSRW+9hNmnnOIbJ7OEwRl8cqvjLzcuJX3e0eCM3AtYT2l pEjO5zjaxQYJFno3+6H88Z8TA+93ZOH/ugBvhn76+10LYKxj8eosfH5AhOQOprbBHb oN1YZV1f00o2Da18XxRvHA+1b0VQ+dAEgLAoR3YNAaahhaHQQJoN/af8h904oZH1YH kN6SRIHvjPx0yO6rJcC4186/m/+n0K1AAKL88XNemd1KRi9XDFfBPQ8DzYWzIrd4l3 GiOgkynazUl2g== Received: from [192.168.10.125] ([73.60.223.101]) by resomta-po-19v.sys.comcast.net with ESMTPSA id 8U6IgWTEhhvlZ8U6IgG9kk; Fri, 05 Oct 2018 17:41:18 +0000 From: Paul Koning Mime-Version: 1.0 (Mac OS X Mail 11.5 \(3445.9.1\)) Subject: [PATCH, pdp11] remove -mfloat32, -mfloat64 Message-Id: <3E27D66A-4DB8-43F4-BE37-312982256488@comcast.net> Date: Fri, 5 Oct 2018 13:41:16 -0400 To: GCC patches This patch removes switches that allow the size of "float" to be either the usual 4, or 8 -- which is also the size of "double". That second choice creates problems for Fortran and violates the Fortran standard. I don't see a reason for having the option; it certainly is not a familiar thing to do on this machine. Committed. paul ChangeLog: 2018-10-05 Paul Koning * config/pdp11/pdp11.h (FLOAT_TYPE_SIZE): Always 32. * config/pdp11/pdp11.opt (mfloat32): Remove. (mfloat64): Remove. * doc/invoke.texi (pdp11 -mfloat32): Remove: (pdp11 -mfloat64): Remove. Index: doc/invoke.texi =================================================================== --- doc/invoke.texi (revision 264880) +++ doc/invoke.texi (revision 264881) @@ -1007,7 +1007,6 @@ Objective-C and Objective-C++ Dialects}. @emph{PDP-11 Options} @gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol -mint32 -mno-int16 -mint16 -mno-int32 @gol --mfloat32 -mno-float64 -mfloat64 -mno-float32 @gol -msplit -munix-asm -mdec-asm -mgnu-asm -mlra} @emph{picoChip Options} @@ -22722,18 +22721,6 @@ Use 16-bit @code{int}. This is the default. @opindex mno-int16 Use 32-bit @code{int}. -@item -mfloat64 -@itemx -mno-float32 -@opindex mfloat64 -@opindex mno-float32 -Use 64-bit @code{float}. This is the default. - -@item -mfloat32 -@itemx -mno-float64 -@opindex mfloat32 -@opindex mno-float64 -Use 32-bit @code{float}. - @item -msplit @opindex msplit Target has split instruction and data space. Implies -m45. Index: config/pdp11/pdp11.opt =================================================================== --- config/pdp11/pdp11.opt (revision 264880) +++ config/pdp11/pdp11.opt (revision 264881) @@ -42,14 +42,6 @@ mgnu-asm Target RejectNegative Report Mask(GNU_ASM) Negative(munix-asm) Use the GNU assembler syntax. -mfloat32 -Target Report Mask(FLOAT32) -Use 32 bit float. - -mfloat64 -Target Report InverseMask(FLOAT32, FLOAT64) -Use 64 bit float. - mfpu Target RejectNegative Report Mask(FPU) Use hardware floating point. Index: config/pdp11/pdp11.h =================================================================== --- config/pdp11/pdp11.h (revision 264880) +++ config/pdp11/pdp11.h (revision 264881) @@ -59,12 +59,14 @@ along with GCC; see the file COPYING3. If not see #define LONG_TYPE_SIZE 32 #define LONG_LONG_TYPE_SIZE 64 -/* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit - of saving core for huge arrays - the definitions are - already in md - but floats can never reside in - an FPU register - we keep the FPU in double float mode - all the time !! */ -#define FLOAT_TYPE_SIZE (TARGET_FLOAT32 ? 32 : 64) +/* In earlier versions, FLOAT_TYPE_SIZE was selectable as 32 or 64, + but that conflicts with Fortran language rules. Since there is no + obvious reason why we should have that feature -- other targets + generally don't have float and double the same size -- I've removed + it. Note that it continues to be true (for now) that arithmetic is + always done with 64-bit values, i.e., the FPU is always in "double" + mode. */ +#define FLOAT_TYPE_SIZE 32 #define DOUBLE_TYPE_SIZE 64 #define LONG_DOUBLE_TYPE_SIZE 64 @@ -200,12 +202,11 @@ extern const struct real_format pdp11_d_format; MUL_REGS are used for odd numbered regs, to use in 16-bit multiplication (even numbered do 32-bit multiply) -LMUL_REGS long multiply registers (even numbered regs ) - (don't need them, all 32-bit regs are even numbered!) GENERAL_REGS is all cpu LOAD_FPU_REGS is the first four cpu regs, they are easier to load NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them FPU_REGS is all fpu regs +CC_REGS is the condition codes (CPU and FPU) */ enum reg_class