===================================================================
@@ -283,7 +283,6 @@
enum machine_mode, enum reg_class);
extern bool mips_dangerous_for_la25_p (rtx);
extern bool mips_modes_tieable_p (enum machine_mode, enum machine_mode);
-extern enum reg_class mips_preferred_reload_class (rtx, enum reg_class);
extern enum reg_class mips_secondary_reload_class (enum reg_class,
enum machine_mode,
rtx, bool);
===================================================================
@@ -10804,10 +10804,10 @@
&& !mips_mode_ok_for_mov_fmt_p (mode2)));
}
-/* Implement PREFERRED_RELOAD_CLASS. */
+/* Implement TARGET_PREFERRED_RELOAD_CLASS. */
-enum reg_class
-mips_preferred_reload_class (rtx x, enum reg_class rclass)
+static reg_class_t
+mips_preferred_reload_class (rtx x, reg_class_t rclass)
{
if (mips_dangerous_for_la25_p (x) && reg_class_subset_p (LEA_REGS, rclass))
return LEA_REGS;
@@ -16487,6 +16487,9 @@
#undef TARGET_MACHINE_DEPENDENT_REORG
#define TARGET_MACHINE_DEPENDENT_REORG mips_reorg
+#undef TARGET_PREFERRED_RELOAD_CLASS
+#define TARGET_PREFERRED_RELOAD_CLASS mips_preferred_reload_class
+
#undef TARGET_ASM_FILE_START
#define TARGET_ASM_FILE_START mips_file_start
#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
===================================================================
@@ -2028,9 +2028,6 @@
#define SMALL_INT_UNSIGNED(X) SMALL_OPERAND_UNSIGNED (INTVAL (X))
#define LUI_INT(X) LUI_OPERAND (INTVAL (X))
-#define PREFERRED_RELOAD_CLASS(X,CLASS) \
- mips_preferred_reload_class (X, CLASS)
-
/* The HI and LO registers can only be reloaded via the general
registers. Condition code registers can only be loaded to the
general registers, and from the floating point registers. */