diff mbox series

[aarch64] Update regmove costs for neoverse-v1 and neoverse-512tvb tunings

Message ID 2c189f25-f37d-9ff1-130a-93a00f1c1cd0@arm.com
State New
Headers show
Series [aarch64] Update regmove costs for neoverse-v1 and neoverse-512tvb tunings | expand

Commit Message

Andre Vieira (lists) March 16, 2022, 2:51 p.m. UTC
Hi,

This patch updates the register move tunings for 
-mcpu/-mtune={neoverse-v1,neoverse-512tvb}.

2022-03-16  Tamar Christina  <tamar.christina@arm.com>
                        Andre Vieira <andre.simoesdiasvieira@arm.com>

         * config/aarch64/aarch64.cc (neoversev1_regmove_cost): New 
tuning struct.
         (neoversev1_tunings): Use neoversev1_regmove_cost and update 
store_int cost.
         (neoverse512tvb_tunings): Likewise.

Comments

Richard Sandiford March 16, 2022, 5:12 p.m. UTC | #1
"Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com> writes:
> Hi,
>
> This patch updates the register move tunings for 
> -mcpu/-mtune={neoverse-v1,neoverse-512tvb}.
>
> 2022-03-16  Tamar Christina  <tamar.christina@arm.com>
>                         Andre Vieira <andre.simoesdiasvieira@arm.com>
>
>          * config/aarch64/aarch64.cc (neoversev1_regmove_cost): New 
> tuning struct.
>          (neoversev1_tunings): Use neoversev1_regmove_cost and update 
> store_int cost.
>          (neoverse512tvb_tunings): Likewise.
>
> diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
> index 9b6f67dc592d8a447d6b28390c90abe5dcfa5f08..f0485574528c47221e17a3aa5aee70a56508f61e 100644
> --- a/gcc/config/aarch64/aarch64.cc
> +++ b/gcc/config/aarch64/aarch64.cc
> @@ -670,6 +670,16 @@ static const struct cpu_regmove_cost neoversen2_regmove_cost =
>    2 /* FP2FP  */
>  };
>  
> +static const struct cpu_regmove_cost neoversev1_regmove_cost =
> +{
> +  1, /* GP2GP  */
> +  /* Spilling to int<->fp instead of memory is recommended so set
> +     realistic costs compared to memmv_cost.  */

s/memmv_cost/memmov_cost/

Same for the earlier patches, I just didn't see it till now :-)

OK with that change on the basis that it forms a pair with the follow-on
memmov patch.

Thanks,
Richard

> +  3, /* GP2FP  */
> +  2, /* FP2GP  */
> +  2 /* FP2FP  */
> +};
> +
>  static const struct cpu_regmove_cost demeter_regmove_cost =
>  {
>    1, /* GP2GP  */
> @@ -2063,13 +2073,13 @@ static const struct tune_params neoversev1_tunings =
>  {
>    &cortexa76_extra_costs,
>    &neoversev1_addrcost_table,
> -  &generic_regmove_cost,
> +  &neoversev1_regmove_cost,
>    &neoversev1_vector_cost,
>    &generic_branch_cost,
>    &generic_approx_modes,
>    SVE_256, /* sve_width  */
>    { 4, /* load_int.  */
> -    1, /* store_int.  */
> +    2, /* store_int.  */
>      6, /* load_fp.  */
>      2, /* store_fp.  */
>      6, /* load_pred.  */
> @@ -2200,13 +2210,13 @@ static const struct tune_params neoverse512tvb_tunings =
>  {
>    &cortexa76_extra_costs,
>    &neoversev1_addrcost_table,
> -  &generic_regmove_cost,
> +  &neoversev1_regmove_cost,
>    &neoverse512tvb_vector_cost,
>    &generic_branch_cost,
>    &generic_approx_modes,
>    SVE_128 | SVE_256, /* sve_width  */
>    { 4, /* load_int.  */
> -    1, /* store_int.  */
> +    2, /* store_int.  */
>      6, /* load_fp.  */
>      2, /* store_fp.  */
>      6, /* load_pred.  */
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 9b6f67dc592d8a447d6b28390c90abe5dcfa5f08..f0485574528c47221e17a3aa5aee70a56508f61e 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -670,6 +670,16 @@  static const struct cpu_regmove_cost neoversen2_regmove_cost =
   2 /* FP2FP  */
 };
 
+static const struct cpu_regmove_cost neoversev1_regmove_cost =
+{
+  1, /* GP2GP  */
+  /* Spilling to int<->fp instead of memory is recommended so set
+     realistic costs compared to memmv_cost.  */
+  3, /* GP2FP  */
+  2, /* FP2GP  */
+  2 /* FP2FP  */
+};
+
 static const struct cpu_regmove_cost demeter_regmove_cost =
 {
   1, /* GP2GP  */
@@ -2063,13 +2073,13 @@  static const struct tune_params neoversev1_tunings =
 {
   &cortexa76_extra_costs,
   &neoversev1_addrcost_table,
-  &generic_regmove_cost,
+  &neoversev1_regmove_cost,
   &neoversev1_vector_cost,
   &generic_branch_cost,
   &generic_approx_modes,
   SVE_256, /* sve_width  */
   { 4, /* load_int.  */
-    1, /* store_int.  */
+    2, /* store_int.  */
     6, /* load_fp.  */
     2, /* store_fp.  */
     6, /* load_pred.  */
@@ -2200,13 +2210,13 @@  static const struct tune_params neoverse512tvb_tunings =
 {
   &cortexa76_extra_costs,
   &neoversev1_addrcost_table,
-  &generic_regmove_cost,
+  &neoversev1_regmove_cost,
   &neoverse512tvb_vector_cost,
   &generic_branch_cost,
   &generic_approx_modes,
   SVE_128 | SVE_256, /* sve_width  */
   { 4, /* load_int.  */
-    1, /* store_int.  */
+    2, /* store_int.  */
     6, /* load_fp.  */
     2, /* store_fp.  */
     6, /* load_pred.  */