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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 25 Jun 2019 21:29:12 +0100 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5PKTBkc49217956 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 25 Jun 2019 20:29:11 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A5B89112062; Tue, 25 Jun 2019 20:29:11 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 87FE9112063; Tue, 25 Jun 2019 20:29:11 +0000 (GMT) Received: from genoa.aus.stglabs.ibm.com (unknown [9.40.192.157]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Tue, 25 Jun 2019 20:29:11 +0000 (GMT) Received: by genoa.aus.stglabs.ibm.com (Postfix, from userid 1025) id 575D0A60E3E; Tue, 25 Jun 2019 15:29:10 -0500 (CDT) From: acsawdey@linux.ibm.com To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, wschmidt@linux.ibm.com, dje.gcc@gmail.com, acsawdey@linux.ibm.com, nickc@redhat.com Subject: [PATCH 15/30] Changes to m32r Date: Tue, 25 Jun 2019 15:22:24 -0500 In-Reply-To: References: In-Reply-To: References: x-cbid: 19062520-0052-0000-0000-000003D6250A X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011329; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01223212; UDB=6.00643701; IPR=6.01004384; MB=3.00027467; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-25 20:29:14 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19062520-0053-0000-0000-000061756AFF Message-Id: <2bc0de8f0177c9a412c46bafec959762590d47b8.1561408899.git.acsawdey@linux.ibm.com> X-IsSubscribed: yes From: Aaron Sawdey * config/m32r/m32r.c (m32r_expand_block_move): Change movmem to cpymem. * config/m32r/m32r.md (movmemsi, movmemsi_internal): Change movmem to cpymem. --- gcc/config/m32r/m32r.c | 4 ++-- gcc/config/m32r/m32r.md | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c index 6e79b2a..ac18aa2 100644 --- a/gcc/config/m32r/m32r.c +++ b/gcc/config/m32r/m32r.c @@ -2598,7 +2598,7 @@ m32r_expand_block_move (rtx operands[]) to the word after the end of the source block, and dst_reg to point to the last word of the destination block, provided that the block is MAX_MOVE_BYTES long. */ - emit_insn (gen_movmemsi_internal (dst_reg, src_reg, at_a_time, + emit_insn (gen_cpymemsi_internal (dst_reg, src_reg, at_a_time, new_dst_reg, new_src_reg)); emit_move_insn (dst_reg, new_dst_reg); emit_move_insn (src_reg, new_src_reg); @@ -2612,7 +2612,7 @@ m32r_expand_block_move (rtx operands[]) } if (leftover) - emit_insn (gen_movmemsi_internal (dst_reg, src_reg, GEN_INT (leftover), + emit_insn (gen_cpymemsi_internal (dst_reg, src_reg, GEN_INT (leftover), gen_reg_rtx (SImode), gen_reg_rtx (SImode))); return 1; diff --git a/gcc/config/m32r/m32r.md b/gcc/config/m32r/m32r.md index be57397..e944363 100644 --- a/gcc/config/m32r/m32r.md +++ b/gcc/config/m32r/m32r.md @@ -2195,7 +2195,7 @@ ;; Argument 2 is the length ;; Argument 3 is the alignment -(define_expand "movmemsi" +(define_expand "cpymemsi" [(parallel [(set (match_operand:BLK 0 "general_operand" "") (match_operand:BLK 1 "general_operand" "")) (use (match_operand:SI 2 "immediate_operand" "")) @@ -2214,7 +2214,7 @@ ;; Insn generated by block moves -(define_insn "movmemsi_internal" +(define_insn "cpymemsi_internal" [(set (mem:BLK (match_operand:SI 0 "register_operand" "r")) ;; destination (mem:BLK (match_operand:SI 1 "register_operand" "r"))) ;; source (use (match_operand:SI 2 "m32r_block_immediate_operand" "J"));; # bytes to move