From patchwork Fri Mar 20 08:48:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Andre Vieira (lists)" X-Patchwork-Id: 1258710 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48kHVR1RzJz9sRf for ; Fri, 20 Mar 2020 19:48:14 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0072039450FB; Fri, 20 Mar 2020 08:48:12 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id BAC7D3875DFD for ; Fri, 20 Mar 2020 08:48:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org BAC7D3875DFD Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=andre.simoesdiasvieira@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 70F9F30E; Fri, 20 Mar 2020 01:48:09 -0700 (PDT) Received: from [10.57.19.247] (unknown [10.57.19.247]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AF38F3F305; Fri, 20 Mar 2020 01:52:11 -0700 (PDT) Subject: [PATCH 1/2][GCC][Arm]: Fix MVE move from GPR -> GPR From: "Andre Vieira (lists)" To: "gcc-patches@gcc.gnu.org" References: <1df1a9b3-c8db-2492-bc80-bc92880755aa@arm.com> Message-ID: <285ba63f-aad4-2701-d0ef-43be0f7106f7@arm.com> Date: Fri, 20 Mar 2020 08:48:07 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <1df1a9b3-c8db-2492-bc80-bc92880755aa@arm.com> Content-Language: en-US X-Spam-Status: No, score=-24.4 required=5.0 tests=BAYES_00, GARBLED_BODY, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch fixes the pattern mve_mov for the case where both MVE vectors are in R registers and the move does not get optimized away.  I use the same approach as we do for NEON, where we use four register moves. Bootstrapped on arm-linux-gnueabihf and ran mve testsuite on arm-none-eabi. Is this OK for trunk? gcc/ChangeLog: 2020-03-20  Andre Vieira          * config/arm/mve.md (mve_mov): Fix R->R case. gcc/testsuite/ChangeLog: 2020-03-**  Andre Vieira          * gcc.target/arm/mve/intrinsics/mve_move_gpr_to_gpr.c: New test. diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 3cdb2e71cf04d45d220f6667646d226c8015659a..3015df7a6af0ab50e0ae47894f63597ada8566c5 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -295,7 +295,7 @@ (define_insn "*mve_mov" else return "vldrb.8 %q0, %E1"; case 5: - return output_move_neon (operands); + return output_move_quad (operands); case 7: return "vstrb.8 %q1, %E0"; default: @@ -303,7 +303,7 @@ (define_insn "*mve_mov" return ""; } } - [(set_attr "type" "mve_move,mve_move,mve_move,mve_move,mve_load,mve_move,mve_move,mve_store") + [(set_attr "type" "mve_move,mve_move,mve_move,mve_move,mve_load,multiple,mve_move,mve_store") (set_attr "length" "4,8,8,4,8,8,4,4") (set_attr "thumb2_pool_range" "*,*,*,*,1018,*,*,*") (set_attr "neg_pool_range" "*,*,*,*,996,*,*,*")]) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_move_gpr_to_gpr.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_move_gpr_to_gpr.c new file mode 100644 index 0000000000000000000000000000000000000000..791b8529a052dfca42e12648b6967eca3a2a985e --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_move_gpr_to_gpr.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ +/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-additional-options "-O2 -mfloat-abi=softfp" } */ + +#include "arm_mve.h" + +extern int bar (float16x8_t, float16_t); + +extern void foobar (float16_t); + +int +foo (float16x8_t a, float16_t b) +{ + foobar (b); + return bar (a, b); +} +