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Date: Thu, 27 Jun 2024 09:22:43 +0800 Message-Id: <20240627012243.2662454-1-lin1.hu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Hi, all This patch aims to refactor vcvttps2qq/vcvtqq2ps patterns for remove redundant round_*_modev8sf_condition. Bootstrapped and regtested on x86-64-linux-gnu, OK for trunk? BRs, Lin gcc/ChangeLog: * config/i386/sse.md (float2): Refactor the pattern. (unspec_fix_trunc2): Ditto. (fix_trunc2): Ditto. * config/i386/subst.md (round_modev8sf_condition): Remove. (round_saeonly_modev8sf_condition): Ditto. --- gcc/config/i386/sse.md | 51 +++++++++++++++++----------------------- gcc/config/i386/subst.md | 2 -- 2 files changed, 22 insertions(+), 31 deletions(-) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 0be2dcd8891..cf8de6347cf 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1157,6 +1157,9 @@ (define_mode_attr ssePSmodelower (define_mode_attr ssePSmode2 [(V8DI "V8SF") (V4DI "V4SF")]) +(define_mode_attr ssePSmode2lower + [(V8DI "v8sf") (V4DI "v4sf")]) + ;; Mapping of vector modes back to the scalar modes (define_mode_attr ssescalarmode [(V64QI "QI") (V32QI "QI") (V16QI "QI") @@ -8861,27 +8864,17 @@ (define_insn "float2 insn patterns (define_mode_attr qq2pssuff - [(V8SF "") (V4SF "{y}")]) - -(define_mode_attr sselongvecmode - [(V8SF "V8DI") (V4SF "V4DI")]) - -(define_mode_attr sselongvecmodelower - [(V8SF "v8di") (V4SF "v4di")]) - -(define_mode_attr sseintvecmode3 - [(V8SF "XI") (V4SF "OI") - (V8DF "OI") (V4DF "TI")]) + [(V8DI "") (V4DI "{y}")]) -(define_insn "float2" - [(set (match_operand:VF1_128_256VL 0 "register_operand" "=v") - (any_float:VF1_128_256VL - (match_operand: 1 "nonimmediate_operand" "")))] - "TARGET_AVX512DQ && " +(define_insn "float2" + [(set (match_operand: 0 "register_operand" "=v") + (any_float: + (match_operand:VI8_256_512 1 "nonimmediate_operand" "")))] + "TARGET_AVX512DQ && " "vcvtqq2ps\t{%1, %0|%0, %1}" [(set_attr "type" "ssecvt") (set_attr "prefix" "evex") - (set_attr "mode" "")]) + (set_attr "mode" "")]) (define_expand "avx512dq_floatv2div2sf2" [(set (match_operand:V4SF 0 "register_operand" "=v") @@ -9416,26 +9409,26 @@ (define_insn "fixuns_notrunc2" (set_attr "prefix" "evex") (set_attr "mode" "")]) -(define_insn "unspec_fix_trunc2" - [(set (match_operand: 0 "register_operand" "=v") - (unspec: - [(match_operand:VF1_128_256VL 1 "" "")] +(define_insn "unspec_fix_trunc2" + [(set (match_operand:VI8_256_512 0 "register_operand" "=v") + (unspec:VI8_256_512 + [(match_operand: 1 "" "")] UNSPEC_VCVTT_U))] - "TARGET_AVX512DQ && " + "TARGET_AVX512DQ && " "vcvttps2qq\t{%1, %0|%0, %1}" [(set_attr "type" "ssecvt") (set_attr "prefix" "evex") - (set_attr "mode" "")]) + (set_attr "mode" "")]) -(define_insn "fix_trunc2" - [(set (match_operand: 0 "register_operand" "=v") - (any_fix: - (match_operand:VF1_128_256VL 1 "" "")))] - "TARGET_AVX512DQ && " +(define_insn "fix_trunc2" + [(set (match_operand:VI8_256_512 0 "register_operand" "=v") + (any_fix:VI8_256_512 + (match_operand: 1 "" "")))] + "TARGET_AVX512DQ && " "vcvttps2qq\t{%1, %0|%0, %1}" [(set_attr "type" "ssecvt") (set_attr "prefix" "evex") - (set_attr "mode" "")]) + (set_attr "mode" "")]) (define_insn "unspec_avx512dq_fix_truncv2sfv2di2" [(set (match_operand:V2DI 0 "register_operand" "=v") diff --git a/gcc/config/i386/subst.md b/gcc/config/i386/subst.md index 7a9b697e0f6..40fb92094d2 100644 --- a/gcc/config/i386/subst.md +++ b/gcc/config/i386/subst.md @@ -211,7 +211,6 @@ (define_subst_attr "round_mode512bit_condition" "round" "1" "(mode == V16S || mode == V16SImode || mode == V32HFmode)") -(define_subst_attr "round_modev8sf_condition" "round" "1" "(mode == V8SFmode)") (define_subst_attr "round_modev4sf_condition" "round" "1" "(mode == V4SFmode)") (define_subst_attr "round_codefor" "round" "*" "") (define_subst_attr "round_opnum" "round" "5" "6") @@ -257,7 +256,6 @@ (define_subst_attr "round_saeonly_mode512bit_condition" "round_saeonly" "1" "(mode == V16SImode || mode == V32HFmode)") -(define_subst_attr "round_saeonly_modev8sf_condition" "round_saeonly" "1" "(mode == V8SFmode)") (define_subst "round_saeonly" [(set (match_operand:SUBST_A 0)