diff mbox series

[V5,2/2] split complicate 64bit constant to memory for -m32 -mpowerpc64

Message ID 20240613021940.4000707-2-guojiufu@linux.ibm.com
State New
Headers show
Series [V5,1/2] split complicate 64bit constant to memory | expand

Commit Message

Jiufu Guo June 13, 2024, 2:19 a.m. UTC 
Hi,

For "-m32 -mpowerpc64", it is also ok to use just one instruciton (p?ld)
to loading 64bit constant from memory. So, splitting the complicate 64bit
constant to constant pool should also work under this case.

Compare with previous version, this update the threshold for the insn number
of the constant.

Bootstrap and regtest pass on ppc64{,le}.
Also no regression for "-m32 -mpowerpc64" variation on ppc64.
Is this ok for trunk?

BR,
Jeff(Jiufu) Guo

gcc/ChangeLog:

	* config/rs6000/rs6000.cc (rs6000_emit_set_const): Split constant to
	pool for "-m32 -mpowerpc64".

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/pr63281.c: Allow checking -m32.
---
 gcc/config/rs6000/rs6000.cc                | 21 ++++++++++++++++++++-
 gcc/testsuite/gcc.target/powerpc/pr63281.c |  4 ++--
 2 files changed, 22 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index bc9d6f5c34f..278b39ac9a3 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -10242,7 +10242,8 @@  rs6000_emit_set_const (rtx dest, rtx source)
 	}
 
       else if ((can_create_pseudo_p () || base_reg_operand (dest, mode))
-	       && TARGET_64BIT && num_insns_constant (source, mode) > 2)
+	       && num_insns_constant (source, mode)
+		    > (TARGET_32BIT && TARGET_CMODEL != CMODEL_SMALL ? 3 : 2))
 	{
 	  rtx sym = force_const_mem (mode, source);
 	  if (TARGET_TOC && SYMBOL_REF_P (XEXP (sym, 0))
@@ -10252,6 +10253,24 @@  rs6000_emit_set_const (rtx dest, rtx source)
 	      sym = gen_const_mem (mode, toc);
 	      set_mem_alias_set (sym, get_TOC_alias_set ());
 	    }
+	  else if (TARGET_32BIT)
+	    {
+	      /* After RA, reuse 'DEST' reg.  */
+	      rtx addr = can_create_pseudo_p ()
+			   ? gen_reg_rtx (Pmode)
+			   : gen_rtx_REG (Pmode, REGNO (dest));
+	      rtx sym_ref = XEXP (sym, 0);
+	      if (flag_pic)
+		emit_move_insn (addr, sym_ref);
+	      else
+		{
+		  emit_move_insn (addr, gen_rtx_HIGH (Pmode, sym_ref));
+		  emit_move_insn (addr, gen_rtx_LO_SUM (Pmode, addr, sym_ref));
+		}
+	      rtx mem = gen_rtx_MEM (mode, addr);
+	      MEM_COPY_ATTRIBUTES (mem, sym);
+	      sym = mem;
+	    }
 
 	  emit_move_insn (dest, sym);
 	}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr63281.c b/gcc/testsuite/gcc.target/powerpc/pr63281.c
index 9763a7181fc..d3d620d3bee 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr63281.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr63281.c
@@ -1,4 +1,4 @@ 
-/* Check loading constant from memory pool.  */
+/* Check loading constant from memory pool under -mpowerpc64 (include -m32).  */
 /* { dg-options "-O2 -mpowerpc64" } */
 
 void
@@ -7,5 +7,5 @@  foo (unsigned long long *a)
   *a++ = 0x2351847027482577ULL;
 }
 
-/* { dg-final { scan-assembler-times {\mp?ld\M} 1 { target { lp64 } } } } */
+/* { dg-final { scan-assembler-times {\mp?ld\M} 1 { target { has_arch_ppc64 } } } } */