diff mbox series

[committed] RISC-V: Fix format issue for trailing operator [NFC]

Message ID 20240514014928.320228-1-pan2.li@intel.com
State New
Headers show
Series [committed] RISC-V: Fix format issue for trailing operator [NFC] | expand

Commit Message

Li, Pan2 May 14, 2024, 1:49 a.m. UTC 
From: Pan Li <pan2.li@intel.com>

This patch would like to fix below format issue of trailing operator.

=== ERROR type #1: trailing operator (4 error(s)) ===
gcc/config/riscv/riscv-vector-builtins.cc:4641:39:  if ((exts &
RVV_REQUIRE_ELEN_FP_16) &&
gcc/config/riscv/riscv-vector-builtins.cc:4651:39:  if ((exts &
RVV_REQUIRE_ELEN_FP_32) &&
gcc/config/riscv/riscv-vector-builtins.cc:4661:39:  if ((exts &
RVV_REQUIRE_ELEN_FP_64) &&
gcc/config/riscv/riscv-vector-builtins.cc:4670:36:  if ((exts &
RVV_REQUIRE_ELEN_64) &&

Passed the ./contrib/check_GNU_style.sh for this patch,  and double
checked there is no other format issue of the original patch.

Committed as format change.

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins.cc
	(validate_instance_type_required_extensions): Remove the
	operator from the trailing and put it to new line.

Signed-off-by: Pan Li <pan2.li@intel.com>
---
 gcc/config/riscv/riscv-vector-builtins.cc | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc
index 3fdb4400d70..c08d87a2680 100644
--- a/gcc/config/riscv/riscv-vector-builtins.cc
+++ b/gcc/config/riscv/riscv-vector-builtins.cc
@@ -4638,8 +4638,8 @@  validate_instance_type_required_extensions (const rvv_type_info type,
 {
   uint64_t exts = type.required_extensions;
 
-  if ((exts & RVV_REQUIRE_ELEN_FP_16) &&
-    !TARGET_VECTOR_ELEN_FP_16_P (riscv_vector_elen_flags))
+  if ((exts & RVV_REQUIRE_ELEN_FP_16)
+    && !TARGET_VECTOR_ELEN_FP_16_P (riscv_vector_elen_flags))
     {
       error_at (EXPR_LOCATION (exp),
 		"built-in function %qE requires the "
@@ -4648,8 +4648,8 @@  validate_instance_type_required_extensions (const rvv_type_info type,
       return false;
     }
 
-  if ((exts & RVV_REQUIRE_ELEN_FP_32) &&
-    !TARGET_VECTOR_ELEN_FP_32_P (riscv_vector_elen_flags))
+  if ((exts & RVV_REQUIRE_ELEN_FP_32)
+    && !TARGET_VECTOR_ELEN_FP_32_P (riscv_vector_elen_flags))
     {
       error_at (EXPR_LOCATION (exp),
 		"built-in function %qE requires the "
@@ -4658,8 +4658,8 @@  validate_instance_type_required_extensions (const rvv_type_info type,
       return false;
     }
 
-  if ((exts & RVV_REQUIRE_ELEN_FP_64) &&
-    !TARGET_VECTOR_ELEN_FP_64_P (riscv_vector_elen_flags))
+  if ((exts & RVV_REQUIRE_ELEN_FP_64)
+    && !TARGET_VECTOR_ELEN_FP_64_P (riscv_vector_elen_flags))
     {
       error_at (EXPR_LOCATION (exp),
 		"built-in function %qE requires the zve64d or v ISA extension",
@@ -4667,8 +4667,8 @@  validate_instance_type_required_extensions (const rvv_type_info type,
       return false;
     }
 
-  if ((exts & RVV_REQUIRE_ELEN_64) &&
-    !TARGET_VECTOR_ELEN_64_P (riscv_vector_elen_flags))
+  if ((exts & RVV_REQUIRE_ELEN_64)
+    && !TARGET_VECTOR_ELEN_64_P (riscv_vector_elen_flags))
     {
       error_at (EXPR_LOCATION (exp),
 		"built-in function %qE requires the "