diff mbox series

RISC-V: testsuite: ensure vtype is call clobbered

Message ID 20240327221404.914824-1-vineetg@rivosinc.com
State New
Headers show
Series RISC-V: testsuite: ensure vtype is call clobbered | expand

Commit Message

Vineet Gupta March 27, 2024, 10:14 p.m. UTC 
Per classic Vector calling convention ABI, vtype is call clobbered,
so ensure gcc generates fresh a VSETVLI after a function call or an
inline asm which clobbers vtype.

ATM gcc seems to be doing the right thing, but a test can never be
harmful.

gcc/testsuite/ChangeLog:
	* gcc.target/riscv/rvv/vtype-call-clobbered.c: New Test.

Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
---
 .../riscv/rvv/vtype-call-clobbered.c          | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vtype-call-clobbered.c

Comments

Jeff Law March 28, 2024, 1:41 p.m. UTC | #1 
On 3/27/24 4:14 PM, Vineet Gupta wrote:
> Per classic Vector calling convention ABI, vtype is call clobbered,
> so ensure gcc generates fresh a VSETVLI after a function call or an
> inline asm which clobbers vtype.
> 
> ATM gcc seems to be doing the right thing, but a test can never be
> harmful.
> 
> gcc/testsuite/ChangeLog:
> 	* gcc.target/riscv/rvv/vtype-call-clobbered.c: New Test.
OK
jeff
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vtype-call-clobbered.c b/gcc/testsuite/gcc.target/riscv/rvv/vtype-call-clobbered.c
new file mode 100644
index 000000000000..be9f312aa508
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vtype-call-clobbered.c
@@ -0,0 +1,47 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64 -O2" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-Os" "-Oz" } } */
+
+#include "riscv_vector.h"
+
+extern void can_clobber_vtype();
+
+static inline void v_loop (void * restrict in, void * restrict out, int n)
+{
+  for (int i = 0; i < n; i++)
+    {
+      vuint8mf8_t v = *(vuint8mf8_t*)(in + i);
+      *(vuint8mf8_t*)(out + i) = v;
+    }
+}
+
+/* Two V instructions back-back.
+   Only 1 vsetvli insn.  */
+void
+vec1 (void * restrict in, void * restrict out1,  void * restrict out2, int n)
+{
+     v_loop(in, out1, n);
+     v_loop(in, out2, n);
+}
+
+/* Two V instructions seperated by a function call.
+   Both need to have a corresponding vsetvli insn.  */
+void
+vec2 (void * restrict in, void * restrict out1,  void * restrict out2, int n)
+{
+     v_loop(in, out1, n);
+     can_clobber_vtype();
+     v_loop(in, out2, n);
+}
+
+/* Two V instructions seperated by an inline asm with vtype clobber.
+   Both need to have a corresponding vsetvli insn.  */
+void
+vec3 (void * restrict in, void * restrict out1,  void * restrict out2, int n)
+{
+     v_loop(in, out1, n);
+     asm volatile("":::"vtype");
+     v_loop(in, out2, n);
+}
+
+/* { dg-final { scan-assembler-times {vsetvli} 5 } } */