diff mbox series

arm: check for low register before applying peephole [PR113510]

Message ID 20240305173644.3892514-1-rearnsha@arm.com
State New
Headers show
Series arm: check for low register before applying peephole [PR113510] | expand

Commit Message

Richard Earnshaw March 5, 2024, 5:36 p.m. UTC 
For thumb1, when using a peephole to fuse

	mov reg, #const
	add reg, reg, SP

into

	add reg, SP, #const

we must first check that reg is a low register, otherwise we will ICE
when trying to recognize the resulting insn.

gcc/ChangeLog:

	PR target/113510
	* config/arm/thumb1.md (peephole2 to fuse mov imm/add SP): Use
	low_register_operand.
---

This appears to have gone latent again, but checked against the known
failing version.

 gcc/config/arm/thumb1.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
index 14d6df580af..d7074b43f60 100644
--- a/gcc/config/arm/thumb1.md
+++ b/gcc/config/arm/thumb1.md
@@ -113,7 +113,7 @@  (define_insn_and_split "*thumb1_addsi3"
 ;; Reloading and elimination of the frame pointer can
 ;; sometimes cause this optimization to be missed.
 (define_peephole2
-  [(set (match_operand:SI 0 "arm_general_register_operand" "")
+  [(set (match_operand:SI 0 "low_register_operand" "")
 	(match_operand:SI 1 "const_int_operand" ""))
    (set (match_dup 0)
 	(plus:SI (match_dup 0) (reg:SI SP_REGNUM)))]