diff mbox series

RISC-V: Fix macro fusion for auipc+add, when identifying UNSPEC_AUIPC. [PR113742]

Message ID 20240205032052.15528-1-monk.chiang@sifive.com
State New
Headers show
Series RISC-V: Fix macro fusion for auipc+add, when identifying UNSPEC_AUIPC. [PR113742] | expand

Commit Message

Monk Chiang Feb. 5, 2024, 3:20 a.m. UTC
gcc/ChangeLog:

	PR target/113742
	* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix
	recognizes UNSPEC_AUIPC for RISCV_FUSE_LUI_ADDI.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/pr113742.c: New test.
---
 gcc/config/riscv/riscv.cc                 | 2 +-
 gcc/testsuite/gcc.target/riscv/pr113742.c | 4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/pr113742.c

Comments

Jeff Law Feb. 5, 2024, 3:28 a.m. UTC | #1
On 2/4/24 20:20, Monk Chiang wrote:
> gcc/ChangeLog:
> 
> 	PR target/113742
> 	* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix
> 	recognizes UNSPEC_AUIPC for RISCV_FUSE_LUI_ADDI.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/riscv/pr113742.c: New test.
OK.  Presumably this faulted during an --enable-checking=rtl build or 
something similar?

Jeff
Monk Chiang Feb. 5, 2024, 5:57 a.m. UTC | #2
Yes, this test needs  "--enable-checking=rtl" build.

On Mon, Feb 5, 2024 at 11:28 AM Jeff Law <jeffreyalaw@gmail.com> wrote:

>
>
> On 2/4/24 20:20, Monk Chiang wrote:
> > gcc/ChangeLog:
> >
> >       PR target/113742
> >       * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix
> >       recognizes UNSPEC_AUIPC for RISCV_FUSE_LUI_ADDI.
> >
> > gcc/testsuite/ChangeLog:
> >
> >       * gcc.target/riscv/pr113742.c: New test.
> OK.  Presumably this faulted during an --enable-checking=rtl build or
> something similar?
>
> Jeff
>
Jeff Law Feb. 13, 2024, 4:03 p.m. UTC | #3
On 2/4/24 20:20, Monk Chiang wrote:
> gcc/ChangeLog:
> 
> 	PR target/113742
> 	* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix
> 	recognizes UNSPEC_AUIPC for RISCV_FUSE_LUI_ADDI.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/riscv/pr113742.c: New test.
I was going through the patchwork queue after the call today and it 
looks like this didn't get pushed.  So I took care of it.

Thanks again,
Jeff
Monk Chiang Feb. 14, 2024, 3:42 a.m. UTC | #4
Hi Jeff, 
  I don't have permission to commit, can you push it for me?  If you look good to you.

> Jeff Law <jeffreyalaw@gmail.com> 於 2024年2月14日 凌晨12:03 寫道:
> 
> 
> 
>> On 2/4/24 20:20, Monk Chiang wrote:
>> gcc/ChangeLog:
>>    PR target/113742
>>    * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix
>>    recognizes UNSPEC_AUIPC for RISCV_FUSE_LUI_ADDI.
>> gcc/testsuite/ChangeLog:
>>    * gcc.target/riscv/pr113742.c: New test.
> I was going through the patchwork queue after the call today and it looks like this didn't get pushed.  So I took care of it.
> 
> Thanks again,
> Jeff
Monk Chiang Feb. 14, 2024, 3:42 a.m. UTC | #5
Hi Jeff,
 I don't have permission to commit, can you push it for me?  If you look good to you.

> Jeff Law <jeffreyalaw@gmail.com> 於 2024年2月14日 凌晨12:03 寫道:
> 
> 
> 
>> On 2/4/24 20:20, Monk Chiang wrote:
>> gcc/ChangeLog:
>>   PR target/113742
>>   * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix
>>   recognizes UNSPEC_AUIPC for RISCV_FUSE_LUI_ADDI.
>> gcc/testsuite/ChangeLog:
>>   * gcc.target/riscv/pr113742.c: New test.
> I was going through the patchwork queue after the call today and it looks like this didn't get pushed.  So I took care of it.
> 
> Thanks again,
> Jeff
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 799d7919a4a..4100abc9dd1 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -8434,7 +8434,7 @@  riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
 				(lo_sum:DI (reg:DI rD) (const_int IMM12))) */
 
       if (GET_CODE (SET_SRC (prev_set)) == UNSPEC
-	  && XINT (prev_set, 1) == UNSPEC_AUIPC
+	  && XINT (SET_SRC (prev_set), 1) == UNSPEC_AUIPC
 	  && (GET_CODE (SET_SRC (curr_set)) == LO_SUM
 	      || (GET_CODE (SET_SRC (curr_set)) == PLUS
 		  && SMALL_OPERAND (INTVAL (XEXP (SET_SRC (curr_set), 1))))))
diff --git a/gcc/testsuite/gcc.target/riscv/pr113742.c b/gcc/testsuite/gcc.target/riscv/pr113742.c
new file mode 100644
index 00000000000..ab8934c2a8a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr113742.c
@@ -0,0 +1,4 @@ 
+//* { dg-do compile } */
+/* { dg-options "-O2 -finstrument-functions -mabi=lp64d -mcpu=sifive-p670" } */
+
+void foo(void) {}