| Message ID | 20240202212400.2522387-1-quic_apinski@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | aarch64: Fix undefined code in vect_ctz_1.c | expand |
Andrew Pinski <quic_apinski@quicinc.com> writes: > The testcase gcc.target/aarch64/vect_ctz_1.c fails execution when running > with -march=armv9-a due to the testcase calls __builtin_ctz with a value of 0. > The testcase should not depend on undefined behavior of __builtin_ctz. So this > changes it to use the g form with the 2nd argument of 32. Now the execution part > of the testcase work. It still has a scan-assembler failure which should be fixed > seperately. > > OK? Tested on aarch64-linux-gnu. > > gcc/testsuite/ChangeLog: > > * gcc.target/aarch64/vect_ctz_1.c (TEST): Use g form of the builtin and pass 32 > as the value expected at 0. OK, but it looks like vect-clz.c could use the same fix. I think we have enough coverage elsewhere that we still use CLZ for the "normal" builtins (e.g. sve/clz_1.c). Richard > Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com> > --- > gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c b/gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c > index c4eaf5b3a91..5fcf1e31ab2 100644 > --- a/gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c > +++ b/gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c > @@ -9,7 +9,7 @@ count_tz_##name (unsigned *__restrict a, int *__restrict b) \ > { \ > int i; \ > for (i = 0; i < count; i++) \ > - b[i] = __builtin_##subname (a[i]); \ > + b[i] = __builtin_##subname##g (a[i], 32); \ > } > > #define CHECK(name, count, input, output) \
diff --git a/gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c b/gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c index c4eaf5b3a91..5fcf1e31ab2 100644 --- a/gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c +++ b/gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c @@ -9,7 +9,7 @@ count_tz_##name (unsigned *__restrict a, int *__restrict b) \ { \ int i; \ for (i = 0; i < count; i++) \ - b[i] = __builtin_##subname (a[i]); \ + b[i] = __builtin_##subname##g (a[i], 32); \ } #define CHECK(name, count, input, output) \
The testcase gcc.target/aarch64/vect_ctz_1.c fails execution when running with -march=armv9-a due to the testcase calls __builtin_ctz with a value of 0. The testcase should not depend on undefined behavior of __builtin_ctz. So this changes it to use the g form with the 2nd argument of 32. Now the execution part of the testcase work. It still has a scan-assembler failure which should be fixed seperately. OK? Tested on aarch64-linux-gnu. gcc/testsuite/ChangeLog: * gcc.target/aarch64/vect_ctz_1.c (TEST): Use g form of the builtin and pass 32 as the value expected at 0. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com> --- gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)