new file mode 100644
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-msse2 -O2 -fno-vect-cost-model" } */
+
+typedef float __attribute__ ((vector_size (16))) vec;
+typedef int __attribute__ ((vector_size (16))) ivec;
+ivec x;
+
+void
+test (void)
+{
+ register vec a asm("xmm3"), b asm("xmm4");
+ register ivec c asm("xmm5");
+ for (int i = 0; i < 4; i++)
+ c[i] = a[i] < b[i] ? -1 : 1;
+ x = c;
+}
@@ -4325,6 +4325,11 @@ vect_check_gather_scatter (stmt_vec_info stmt_info, loop_vec_info loop_vinfo,
if (!multiple_p (pbitpos, BITS_PER_UNIT))
return false;
+ /* We need to be able to form an address to the base which for example
+ isn't possible for hard registers. */
+ if (may_be_nonaddressable_p (base))
+ return false;
+
poly_int64 pbytepos = exact_div (pbitpos, BITS_PER_UNIT);
if (TREE_CODE (base) == MEM_REF)