| Message ID | 20231128155609.198744-4-victor.donascimento@arm.com |
|---|---|
| State | New |
| Headers | show |
| Series | aarch64: Add Armv9.4-a 128-bit system-register read/write support | expand |
Hi Victor, > -----Original Message----- > From: Victor Do Nascimento <victor.donascimento@arm.com> > Sent: Tuesday, November 28, 2023 3:56 PM > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Sandiford > <Richard.Sandiford@arm.com>; Richard Earnshaw > <Richard.Earnshaw@arm.com>; Victor Do Nascimento > <Victor.DoNascimento@arm.com> > Subject: [PATCH v2 3/5] aarch64: Sync `aarch64-sys-regs.def' with Binutils. > > This patch updates `aarch64-sys-regs.def', bringing it into sync with > the Binutils source. > > gcc/ChangeLog: > > * config/aarch64/aarch64-sys-regs.def (par_el1): New. > (rcwmask_el1): Likewise. > (rcwsmask_el1): Likewise. > (ttbr0_el1): Likewise. > (ttbr0_el12): Likewise. > (ttbr0_el2): Likewise. > (ttbr1_el1): Likewise. > (ttbr1_el12): Likewise. > (ttbr1_el2): Likewise. > (vttbr_el2): Likewise. > (gcspr_el0): Likewise. > (gcspr_el1): Likewise. > (gcspr_el12): Likewise. > (gcspr_el2): Likewise. > (gcspr_el3): Likewise. > (gcscre0_el1): Likewise. > (gcscr_el1): Likewise. > (gcscr_el12): Likewise. > (gcscr_el2): Likewise. > (gcscr_el3): Likewise. In the case where we copy a file from elsewhere or regenerate we can just use the short entry: * config/aarch64/aarch64-sys-regs.def: Copy from Binutils. Or something equivalent. Ok with and adjusted ChangeLog. Thanks, Kyrill > --- > gcc/config/aarch64/aarch64-sys-regs.def | 30 +++++++++++++++++-------- > 1 file changed, 21 insertions(+), 9 deletions(-) > > diff --git a/gcc/config/aarch64/aarch64-sys-regs.def > b/gcc/config/aarch64/aarch64-sys-regs.def > index d24a2455503..96bdadb0b0f 100644 > --- a/gcc/config/aarch64/aarch64-sys-regs.def > +++ b/gcc/config/aarch64/aarch64-sys-regs.def > @@ -419,6 +419,16 @@ > SYSREG ("fpcr", CPENC (3,3,4,4,0), 0, > AARCH64_NO_FEATURES) > SYSREG ("fpexc32_el2", CPENC (3,4,5,3,0), 0, > AARCH64_NO_FEATURES) > SYSREG ("fpsr", CPENC (3,3,4,4,1), 0, > AARCH64_NO_FEATURES) > + SYSREG ("gcspr_el0", CPENC (3,3,2,5,1), F_ARCHEXT, > AARCH64_FEATURE (GCS)) > + SYSREG ("gcspr_el1", CPENC (3,0,2,5,1), F_ARCHEXT, > AARCH64_FEATURE (GCS)) > + SYSREG ("gcspr_el2", CPENC (3,4,2,5,1), F_ARCHEXT, > AARCH64_FEATURE (GCS)) > + SYSREG ("gcspr_el12", CPENC (3,5,2,5,1), F_ARCHEXT, > AARCH64_FEATURE (GCS)) > + SYSREG ("gcspr_el3", CPENC (3,6,2,5,1), F_ARCHEXT, > AARCH64_FEATURE (GCS)) > + SYSREG ("gcscre0_el1", CPENC (3,0,2,5,2), F_ARCHEXT, > AARCH64_FEATURE (GCS)) > + SYSREG ("gcscr_el1", CPENC (3,0,2,5,0), F_ARCHEXT, > AARCH64_FEATURE (GCS)) > + SYSREG ("gcscr_el2", CPENC (3,4,2,5,0), F_ARCHEXT, > AARCH64_FEATURE (GCS)) > + SYSREG ("gcscr_el12", CPENC (3,5,2,5,0), F_ARCHEXT, > AARCH64_FEATURE (GCS)) > + SYSREG ("gcscr_el3", CPENC (3,6,2,5,0), F_ARCHEXT, > AARCH64_FEATURE (GCS)) > SYSREG ("gcr_el1", CPENC (3,0,1,0,6), F_ARCHEXT, > AARCH64_FEATURE (MEMTAG)) > SYSREG ("gmid_el1", CPENC (3,1,0,0,4), > F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (MEMTAG)) > SYSREG ("gpccr_el3", CPENC (3,6,2,1,6), 0, > AARCH64_NO_FEATURES) > @@ -584,7 +594,7 @@ > SYSREG ("oslar_el1", CPENC (2,0,1,0,4), F_REG_WRITE, > AARCH64_NO_FEATURES) > SYSREG ("oslsr_el1", CPENC (2,0,1,1,4), F_REG_READ, > AARCH64_NO_FEATURES) > SYSREG ("pan", CPENC (3,0,4,2,3), F_ARCHEXT, > AARCH64_FEATURE (PAN)) > - SYSREG ("par_el1", CPENC (3,0,7,4,0), 0, > AARCH64_NO_FEATURES) > + SYSREG ("par_el1", CPENC (3,0,7,4,0), F_REG_128, > AARCH64_NO_FEATURES) > SYSREG ("pmbidr_el1", CPENC (3,0,9,10,7), > F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PROFILE)) > SYSREG ("pmblimitr_el1", CPENC (3,0,9,10,0), F_ARCHEXT, > AARCH64_FEATURE (PROFILE)) > SYSREG ("pmbptr_el1", CPENC (3,0,9,10,1), F_ARCHEXT, > AARCH64_FEATURE (PROFILE)) > @@ -746,6 +756,8 @@ > SYSREG ("prlar_el2", CPENC (3,4,6,8,1), F_ARCHEXT, > AARCH64_FEATURE (V8R)) > SYSREG ("prselr_el1", CPENC (3,0,6,2,1), F_ARCHEXT, > AARCH64_FEATURE (V8R)) > SYSREG ("prselr_el2", CPENC (3,4,6,2,1), F_ARCHEXT, > AARCH64_FEATURE (V8R)) > + SYSREG ("rcwmask_el1", CPENC (3,0,13,0,6), > F_ARCHEXT|F_REG_128, AARCH64_FEATURE (THE)) > + SYSREG ("rcwsmask_el1", CPENC (3,0,13,0,3), > F_ARCHEXT|F_REG_128, AARCH64_FEATURE (THE)) > SYSREG ("revidr_el1", CPENC (3,0,0,0,6), F_REG_READ, > AARCH64_NO_FEATURES) > SYSREG ("rgsr_el1", CPENC (3,0,1,0,5), F_ARCHEXT, > AARCH64_FEATURE (MEMTAG)) > SYSREG ("rmr_el1", CPENC (3,0,12,0,2), 0, > AARCH64_NO_FEATURES) > @@ -1034,13 +1046,13 @@ > SYSREG ("trfcr_el1", CPENC (3,0,1,2,1), F_ARCHEXT, > AARCH64_FEATURE (V8_4A)) > SYSREG ("trfcr_el12", CPENC (3,5,1,2,1), F_ARCHEXT, > AARCH64_FEATURE (V8_4A)) > SYSREG ("trfcr_el2", CPENC (3,4,1,2,1), F_ARCHEXT, > AARCH64_FEATURE (V8_4A)) > - SYSREG ("ttbr0_el1", CPENC (3,0,2,0,0), 0, > AARCH64_NO_FEATURES) > - SYSREG ("ttbr0_el12", CPENC (3,5,2,0,0), F_ARCHEXT, > AARCH64_FEATURE (V8_1A)) > - SYSREG ("ttbr0_el2", CPENC (3,4,2,0,0), F_ARCHEXT, > AARCH64_FEATURE (V8A)) > + SYSREG ("ttbr0_el1", CPENC (3,0,2,0,0), F_REG_128, > AARCH64_NO_FEATURES) > + SYSREG ("ttbr0_el12", CPENC (3,5,2,0,0), > F_ARCHEXT|F_REG_128, AARCH64_FEATURE (V8_1A)) > + SYSREG ("ttbr0_el2", CPENC (3,4,2,0,0), > F_ARCHEXT|F_REG_128, AARCH64_FEATURE (V8A)) > SYSREG ("ttbr0_el3", CPENC (3,6,2,0,0), 0, > AARCH64_NO_FEATURES) > - SYSREG ("ttbr1_el1", CPENC (3,0,2,0,1), 0, > AARCH64_NO_FEATURES) > - SYSREG ("ttbr1_el12", CPENC (3,5,2,0,1), F_ARCHEXT, > AARCH64_FEATURE (V8_1A)) > - SYSREG ("ttbr1_el2", CPENC (3,4,2,0,1), F_ARCHEXT, > AARCH64_FEATURES (2, V8A, V8_1A)) > + SYSREG ("ttbr1_el1", CPENC (3,0,2,0,1), F_REG_128, > AARCH64_NO_FEATURES) > + SYSREG ("ttbr1_el12", CPENC (3,5,2,0,1), > F_ARCHEXT|F_REG_128, AARCH64_FEATURE (V8_1A)) > + SYSREG ("ttbr1_el2", CPENC (3,4,2,0,1), > F_ARCHEXT|F_REG_128, AARCH64_FEATURES (2, V8A, V8_1A)) > SYSREG ("uao", CPENC (3,0,4,2,4), F_ARCHEXT, > AARCH64_FEATURE (V8_2A)) > SYSREG ("vbar_el1", CPENC (3,0,12,0,0), 0, > AARCH64_NO_FEATURES) > SYSREG ("vbar_el12", CPENC (3,5,12,0,0), F_ARCHEXT, > AARCH64_FEATURE (V8_1A)) > @@ -1057,8 +1069,8 @@ > SYSREG ("vstcr_el2", CPENC (3,4,2,6,2), F_ARCHEXT, > AARCH64_FEATURE (V8_4A)) > SYSREG ("vsttbr_el2", CPENC (3,4,2,6,0), F_ARCHEXT, > AARCH64_FEATURES (2, V8A, V8_4A)) > SYSREG ("vtcr_el2", CPENC (3,4,2,1,2), 0, > AARCH64_NO_FEATURES) > - SYSREG ("vttbr_el2", CPENC (3,4,2,1,0), F_ARCHEXT, > AARCH64_FEATURE (V8A)) > + SYSREG ("vttbr_el2", CPENC (3,4,2,1,0), > F_ARCHEXT|F_REG_128, AARCH64_FEATURE (V8A)) > SYSREG ("zcr_el1", CPENC (3,0,1,2,0), F_ARCHEXT, > AARCH64_FEATURE (SVE)) > SYSREG ("zcr_el12", CPENC (3,5,1,2,0), F_ARCHEXT, > AARCH64_FEATURE (SVE)) > SYSREG ("zcr_el2", CPENC (3,4,1,2,0), F_ARCHEXT, > AARCH64_FEATURE (SVE)) > - SYSREG ("zcr_el3", CPENC (3,6,1,2,0), F_ARCHEXT, > AARCH64_FEATURE (SVE)) > \ No newline at end of file > + SYSREG ("zcr_el3", CPENC (3,6,1,2,0), F_ARCHEXT, > AARCH64_FEATURE (SVE)) > -- > 2.42.0
diff --git a/gcc/config/aarch64/aarch64-sys-regs.def b/gcc/config/aarch64/aarch64-sys-regs.def index d24a2455503..96bdadb0b0f 100644 --- a/gcc/config/aarch64/aarch64-sys-regs.def +++ b/gcc/config/aarch64/aarch64-sys-regs.def @@ -419,6 +419,16 @@ SYSREG ("fpcr", CPENC (3,3,4,4,0), 0, AARCH64_NO_FEATURES) SYSREG ("fpexc32_el2", CPENC (3,4,5,3,0), 0, AARCH64_NO_FEATURES) SYSREG ("fpsr", CPENC (3,3,4,4,1), 0, AARCH64_NO_FEATURES) + SYSREG ("gcspr_el0", CPENC (3,3,2,5,1), F_ARCHEXT, AARCH64_FEATURE (GCS)) + SYSREG ("gcspr_el1", CPENC (3,0,2,5,1), F_ARCHEXT, AARCH64_FEATURE (GCS)) + SYSREG ("gcspr_el2", CPENC (3,4,2,5,1), F_ARCHEXT, AARCH64_FEATURE (GCS)) + SYSREG ("gcspr_el12", CPENC (3,5,2,5,1), F_ARCHEXT, AARCH64_FEATURE (GCS)) + SYSREG ("gcspr_el3", CPENC (3,6,2,5,1), F_ARCHEXT, AARCH64_FEATURE (GCS)) + SYSREG ("gcscre0_el1", CPENC (3,0,2,5,2), F_ARCHEXT, AARCH64_FEATURE (GCS)) + SYSREG ("gcscr_el1", CPENC (3,0,2,5,0), F_ARCHEXT, AARCH64_FEATURE (GCS)) + SYSREG ("gcscr_el2", CPENC (3,4,2,5,0), F_ARCHEXT, AARCH64_FEATURE (GCS)) + SYSREG ("gcscr_el12", CPENC (3,5,2,5,0), F_ARCHEXT, AARCH64_FEATURE (GCS)) + SYSREG ("gcscr_el3", CPENC (3,6,2,5,0), F_ARCHEXT, AARCH64_FEATURE (GCS)) SYSREG ("gcr_el1", CPENC (3,0,1,0,6), F_ARCHEXT, AARCH64_FEATURE (MEMTAG)) SYSREG ("gmid_el1", CPENC (3,1,0,0,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (MEMTAG)) SYSREG ("gpccr_el3", CPENC (3,6,2,1,6), 0, AARCH64_NO_FEATURES) @@ -584,7 +594,7 @@ SYSREG ("oslar_el1", CPENC (2,0,1,0,4), F_REG_WRITE, AARCH64_NO_FEATURES) SYSREG ("oslsr_el1", CPENC (2,0,1,1,4), F_REG_READ, AARCH64_NO_FEATURES) SYSREG ("pan", CPENC (3,0,4,2,3), F_ARCHEXT, AARCH64_FEATURE (PAN)) - SYSREG ("par_el1", CPENC (3,0,7,4,0), 0, AARCH64_NO_FEATURES) + SYSREG ("par_el1", CPENC (3,0,7,4,0), F_REG_128, AARCH64_NO_FEATURES) SYSREG ("pmbidr_el1", CPENC (3,0,9,10,7), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PROFILE)) SYSREG ("pmblimitr_el1", CPENC (3,0,9,10,0), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) SYSREG ("pmbptr_el1", CPENC (3,0,9,10,1), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) @@ -746,6 +756,8 @@ SYSREG ("prlar_el2", CPENC (3,4,6,8,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) SYSREG ("prselr_el1", CPENC (3,0,6,2,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) SYSREG ("prselr_el2", CPENC (3,4,6,2,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) + SYSREG ("rcwmask_el1", CPENC (3,0,13,0,6), F_ARCHEXT|F_REG_128, AARCH64_FEATURE (THE)) + SYSREG ("rcwsmask_el1", CPENC (3,0,13,0,3), F_ARCHEXT|F_REG_128, AARCH64_FEATURE (THE)) SYSREG ("revidr_el1", CPENC (3,0,0,0,6), F_REG_READ, AARCH64_NO_FEATURES) SYSREG ("rgsr_el1", CPENC (3,0,1,0,5), F_ARCHEXT, AARCH64_FEATURE (MEMTAG)) SYSREG ("rmr_el1", CPENC (3,0,12,0,2), 0, AARCH64_NO_FEATURES) @@ -1034,13 +1046,13 @@ SYSREG ("trfcr_el1", CPENC (3,0,1,2,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) SYSREG ("trfcr_el12", CPENC (3,5,1,2,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) SYSREG ("trfcr_el2", CPENC (3,4,1,2,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("ttbr0_el1", CPENC (3,0,2,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("ttbr0_el12", CPENC (3,5,2,0,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("ttbr0_el2", CPENC (3,4,2,0,0), F_ARCHEXT, AARCH64_FEATURE (V8A)) + SYSREG ("ttbr0_el1", CPENC (3,0,2,0,0), F_REG_128, AARCH64_NO_FEATURES) + SYSREG ("ttbr0_el12", CPENC (3,5,2,0,0), F_ARCHEXT|F_REG_128, AARCH64_FEATURE (V8_1A)) + SYSREG ("ttbr0_el2", CPENC (3,4,2,0,0), F_ARCHEXT|F_REG_128, AARCH64_FEATURE (V8A)) SYSREG ("ttbr0_el3", CPENC (3,6,2,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("ttbr1_el1", CPENC (3,0,2,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("ttbr1_el12", CPENC (3,5,2,0,1), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("ttbr1_el2", CPENC (3,4,2,0,1), F_ARCHEXT, AARCH64_FEATURES (2, V8A, V8_1A)) + SYSREG ("ttbr1_el1", CPENC (3,0,2,0,1), F_REG_128, AARCH64_NO_FEATURES) + SYSREG ("ttbr1_el12", CPENC (3,5,2,0,1), F_ARCHEXT|F_REG_128, AARCH64_FEATURE (V8_1A)) + SYSREG ("ttbr1_el2", CPENC (3,4,2,0,1), F_ARCHEXT|F_REG_128, AARCH64_FEATURES (2, V8A, V8_1A)) SYSREG ("uao", CPENC (3,0,4,2,4), F_ARCHEXT, AARCH64_FEATURE (V8_2A)) SYSREG ("vbar_el1", CPENC (3,0,12,0,0), 0, AARCH64_NO_FEATURES) SYSREG ("vbar_el12", CPENC (3,5,12,0,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) @@ -1057,8 +1069,8 @@ SYSREG ("vstcr_el2", CPENC (3,4,2,6,2), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) SYSREG ("vsttbr_el2", CPENC (3,4,2,6,0), F_ARCHEXT, AARCH64_FEATURES (2, V8A, V8_4A)) SYSREG ("vtcr_el2", CPENC (3,4,2,1,2), 0, AARCH64_NO_FEATURES) - SYSREG ("vttbr_el2", CPENC (3,4,2,1,0), F_ARCHEXT, AARCH64_FEATURE (V8A)) + SYSREG ("vttbr_el2", CPENC (3,4,2,1,0), F_ARCHEXT|F_REG_128, AARCH64_FEATURE (V8A)) SYSREG ("zcr_el1", CPENC (3,0,1,2,0), F_ARCHEXT, AARCH64_FEATURE (SVE)) SYSREG ("zcr_el12", CPENC (3,5,1,2,0), F_ARCHEXT, AARCH64_FEATURE (SVE)) SYSREG ("zcr_el2", CPENC (3,4,1,2,0), F_ARCHEXT, AARCH64_FEATURE (SVE)) - SYSREG ("zcr_el3", CPENC (3,6,1,2,0), F_ARCHEXT, AARCH64_FEATURE (SVE)) \ No newline at end of file + SYSREG ("zcr_el3", CPENC (3,6,1,2,0), F_ARCHEXT, AARCH64_FEATURE (SVE))