| Message ID | 20231006115600.20630-3-Ezra.Sitorus@arm.com |
|---|---|
| State | New |
| Headers | show |
| Series | arm: vst1_types_xN ACLE intrinsics | expand |
On 06/10/2023 12:55, Ezra.Sitorus@arm.com wrote: > From: Ezra Sitorus <ezra.sitorus@arm.com> > > This patch is part of a series of patches implementing the _xN variants of the vst1 intrinsic for arm32. > This patch adds the _x3 variants of the vst1 intrinsic. > OK, but see comments on the first patch about naming and formatting. R. > ACLE documents are at https://developer.arm.com/documentation/ihi0053/latest/ > ISA documents are at https://developer.arm.com/documentation/ddi0487/latest/ > > gcc/ChangeLog: > * config/arm/arm_neon.h > (vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New. > (vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New. > (vst1_f16_x3, vst1_f32_x3): New. > (vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New. > (vst1_bf16_x3): New. > * config/arm/arm_neon_builtins.def (vst1_x3): New entries. > * config/arm/neon.md (vst1_x3<mode>): New. > > gcc/testsuite/ChangeLog: > * gcc.target/arm/simd/vst1_base_xN_1.c: Add new test. > * gcc.target/arm/simd/vst1_bf16_xN_1.c: Add new test. > * gcc.target/arm/simd/vst1_fp16_xN_1.c: Add new test. > * gcc.target/arm/simd/vst1_p64_xN_1.c: Add new test. > --- > gcc/config/arm/arm_neon.h | 114 ++++++++++++++++++ > gcc/config/arm/arm_neon_builtins.def | 1 + > gcc/config/arm/neon.md | 10 ++ > .../gcc.target/arm/simd/vst1_base_xN_1.c | 63 +++++++++- > .../gcc.target/arm/simd/vst1_bf16_xN_1.c | 7 +- > .../gcc.target/arm/simd/vst1_fp16_xN_1.c | 7 +- > .../gcc.target/arm/simd/vst1_p64_xN_1.c | 7 +- > 7 files changed, 202 insertions(+), 7 deletions(-) > > diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h > index 4bd6093281b..b01171e5966 100644 > --- a/gcc/config/arm/arm_neon.h > +++ b/gcc/config/arm/arm_neon.h > @@ -11250,6 +11250,14 @@ vst1_p64_x2 (poly64_t * __a, poly64x1x2_t __b) > __builtin_neon_vst1_x2di ((__builtin_neon_di *) __a, __bu.__o); > } > > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_p64_x3 (poly64_t * __a, poly64x1x3_t __b) > +{ > + union { poly64x1x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3di ((__builtin_neon_di *) __a, __bu.__o); > +} > + > #pragma GCC pop_options > __extension__ extern __inline void > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > @@ -11311,6 +11319,38 @@ vst1_s64_x2 (int64_t * __a, int64x1x2_t __b) > __builtin_neon_vst1_x2di ((__builtin_neon_di *) __a, __bu.__o); > } > > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_s8_x3 (int8_t * __a, int8x8x3_t __b) > +{ > + union { int8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3v8qi ((__builtin_neon_qi *) __a, __bu.__o); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_s16_x3 (int16_t * __a, int16x4x3_t __b) > +{ > + union { int16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3v4hi ((__builtin_neon_hi *) __a, __bu.__o); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_s32_x3 (int32_t * __a, int32x2x3_t __b) > +{ > + union { int32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3v2si ((__builtin_neon_si *) __a, __bu.__o); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_s64_x3 (int64_t * __a, int64x1x3_t __b) > +{ > + union { int64x1x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3di ((__builtin_neon_di *) __a, __bu.__o); > +} > + > #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) > __extension__ extern __inline void > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > @@ -11345,6 +11385,24 @@ vst1_f32_x2 (float32_t * __a, float32x2x2_t __b) > __builtin_neon_vst1_x2v2sf ((__builtin_neon_sf *) __a, __bu.__o); > } > > +#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_f16_x3 (float16_t * __a, float16x4x3_t __b) > +{ > + union { float16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3v4hf (__a, __bu.__o); > +} > +#endif > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_f32_x3 (float32_t * __a, float32x2x3_t __b) > +{ > + union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3v2sf ((__builtin_neon_sf *) __a, __bu.__o); > +} > + > __extension__ extern __inline void > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > vst1_u8 (uint8_t * __a, uint8x8_t __b) > @@ -11405,6 +11463,38 @@ vst1_u64_x2 (uint64_t * __a, uint64x1x2_t __b) > __builtin_neon_vst1_x2di ((__builtin_neon_di *) __a, __bu.__o); > } > > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_u8_x3 (uint8_t * __a, uint8x8x3_t __b) > +{ > + union { uint8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3v8qi ((__builtin_neon_qi *) __a, __bu.__o); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_u16_x3 (uint16_t * __a, uint16x4x3_t __b) > +{ > + union { uint16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3v4hi ((__builtin_neon_hi *) __a, __bu.__o); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_u32_x3 (uint32_t * __a, uint32x2x3_t __b) > +{ > + union { uint32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3v2si ((__builtin_neon_si *) __a, __bu.__o); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_u64_x3 (uint64_t * __a, uint64x1x3_t __b) > +{ > + union { uint64x1x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3di ((__builtin_neon_di *) __a, __bu.__o); > +} > + > __extension__ extern __inline void > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > vst1_p8 (poly8_t * __a, poly8x8_t __b) > @@ -11435,6 +11525,22 @@ vst1_p16_x2 (poly16_t * __a, poly16x4x2_t __b) > __builtin_neon_vst1_x2v4hi ((__builtin_neon_hi *) __a, __bu.__o); > } > > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_p8_x3 (poly8_t * __a, poly8x8x3_t __b) > +{ > + union { poly8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3v8qi ((__builtin_neon_qi *) __a, __bu.__o); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_p16_x3 (poly16_t * __a, poly16x4x3_t __b) > +{ > + union { poly16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3v4hi ((__builtin_neon_hi *) __a, __bu.__o); > +} > + > #pragma GCC push_options > #pragma GCC target ("fpu=crypto-neon-fp-armv8") > __extension__ extern __inline void > @@ -20184,6 +20290,14 @@ vst1_bf16_x2 (bfloat16_t * __a, bfloat16x4x2_t __b) > __builtin_neon_vst1_x2v4hf ((__builtin_neon_bf *) __a, __bu.__o); > } > > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vst1_bf16_x3 (bfloat16_t * __a, bfloat16x4x3_t __b) > +{ > + union { bfloat16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; > + __builtin_neon_vst1_x3v4hf ((__builtin_neon_bf *) __a, __bu.__o); > +} > + > __extension__ extern __inline void > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > vst1q_bf16 (bfloat16_t * __a, bfloat16x8_t __b) > diff --git a/gcc/config/arm/arm_neon_builtins.def b/gcc/config/arm/arm_neon_builtins.def > index 7aef6f958cd..e33b3429f65 100644 > --- a/gcc/config/arm/arm_neon_builtins.def > +++ b/gcc/config/arm/arm_neon_builtins.def > @@ -309,6 +309,7 @@ VAR12 (LOAD1LANE, vld1_lane, > VAR10 (LOAD1, vld1_dup, > v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) > VAR7 (STORE1, vst1_x2, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf) > +VAR7 (STORE1, vst1_x3, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf) > VAR14 (STORE1, vst1, > v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di, > v4bf, v8bf) > diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md > index 7a10e2cb61e..3d1d2aa7d06 100644 > --- a/gcc/config/arm/neon.md > +++ b/gcc/config/arm/neon.md > @@ -5135,6 +5135,16 @@ if (BYTES_BIG_ENDIAN) > [(set_attr "type" "neon_store1_2reg<q>")] > ) > > +(define_insn "neon_vst1_x3<mode>" > + [(set (match_operand:EI 0 "neon_struct_operand" "=Um") > + (unspec:EI [(match_operand:EI 1 "s_register_operand" "w") > + (unspec:VDQX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] > + UNSPEC_VST1))] > + "TARGET_NEON" > + "vst1.<V_sz_elem>\t%h1, %A0" > + [(set_attr "type" "neon_store1_3reg<q>")] > +) > + > (define_insn "neon_vst1<mode>" > [(set (match_operand:VDQX 0 "neon_struct_operand" "=Um") > (unspec:VDQX [(match_operand:VDQX 1 "s_register_operand" "w")] > diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c > index 575897fa422..5f820a6a496 100644 > --- a/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c > +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c > @@ -60,8 +60,63 @@ void test_vst1_p16_x2 (poly16_t * ptr, poly16x4x2_t val) > vst1_p16_x2 (ptr, val); > } > > +void test_vst1_u8_x3 (uint8_t * ptr, uint8x8x3_t val) > +{ > + vst1_u8_x3 (ptr, val); > +} > + > +void test_vst1_u16_x3 (uint16_t * ptr, uint16x4x3_t val) > +{ > + vst1_u16_x3 (ptr, val); > +} > + > +void test_vst1_u32_x3 (uint32_t * ptr, uint32x2x3_t val) > +{ > + vst1_u32_x3 (ptr, val); > +} > + > +void test_vst1_u64_x3 (uint64_t * ptr, uint64x1x3_t val) > +{ > + vst1_u64_x3 (ptr, val); > +} > + > +void test_vst1_s8_x3 (int8_t * ptr, int8x8x3_t val) > +{ > + vst1_s8_x3 (ptr, val); > +} > + > +void test_vst1_s16_x3 (int16_t * ptr, int16x4x3_t val) > +{ > + vst1_s16_x3 (ptr, val); > +} > + > +void test_vst1_s32_x3 (int32_t * ptr, int32x2x3_t val) > +{ > + vst1_s32_x3 (ptr, val); > +} > + > +void test_vst1_s64_x3 (int64_t * ptr, int64x1x3_t val) > +{ > + vst1_s64_x3 (ptr, val); > +} > + > +void test_vst1_f32_x3 (float32_t * ptr, float32x2x3_t val) > +{ > + vst1_f32_x3 (ptr, val); > +} > + > +void test_vst1_p8_x3 (poly8_t * ptr, poly8x8x3_t val) > +{ > + vst1_p8_x3 (ptr, val); > +} > + > +void test_vst1_p16_x3 (poly16_t * ptr, poly16x4x3_t val) > +{ > + vst1_p16_x3 (ptr, val); > +} > + > > -/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */ > -/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */ > -/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */ > -/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */ > +/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */ > +/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */ > +/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */ > +/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 4 } } */ > diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c > index 213fd20ee65..a3a00ead468 100644 > --- a/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c > +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c > @@ -10,4 +10,9 @@ void test_vst1_bf16_x2 (bfloat16_t * ptr, bfloat16x4x2_t val) > vst1_bf16_x2 (ptr, val); > } > > -/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */ > +void test_vst1_bf16_x3 (bfloat16_t * ptr, bfloat16x4x3_t val) > +{ > + vst1_bf16_x3 (ptr, val); > +} > + > +/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */ > diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c > index 523aec92db2..0a6863e24c6 100644 > --- a/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c > +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c > @@ -10,4 +10,9 @@ void test_vst1_f16_x2 (float16_t * ptr, float16x4x2_t val) > vst1_f16_x2 (ptr, val); > } > > -/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */ > +void test_vst1_f16_x3 (float16_t * ptr, float16x4x3_t val) > +{ > + vst1_f16_x3 (ptr, val); > +} > + > +/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */ > diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c > index f590ebd7b94..5dbd6049bc9 100644 > --- a/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c > +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c > @@ -10,4 +10,9 @@ void test_vst1_p64_x2 (poly64_t * ptr, poly64x1x2_t val) > vst1_p64_x2 (ptr, val); > } > > -/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 1 } } */ > \ No newline at end of file > +void test_vst1_p64_x3 (poly64_t * ptr, poly64x1x3_t val) > +{ > + vst1_p64_x3 (ptr, val); > +} > + > +/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */ > \ No newline at end of file
diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h index 4bd6093281b..b01171e5966 100644 --- a/gcc/config/arm/arm_neon.h +++ b/gcc/config/arm/arm_neon.h @@ -11250,6 +11250,14 @@ vst1_p64_x2 (poly64_t * __a, poly64x1x2_t __b) __builtin_neon_vst1_x2di ((__builtin_neon_di *) __a, __bu.__o); } +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_p64_x3 (poly64_t * __a, poly64x1x3_t __b) +{ + union { poly64x1x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3di ((__builtin_neon_di *) __a, __bu.__o); +} + #pragma GCC pop_options __extension__ extern __inline void __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) @@ -11311,6 +11319,38 @@ vst1_s64_x2 (int64_t * __a, int64x1x2_t __b) __builtin_neon_vst1_x2di ((__builtin_neon_di *) __a, __bu.__o); } +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_s8_x3 (int8_t * __a, int8x8x3_t __b) +{ + union { int8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3v8qi ((__builtin_neon_qi *) __a, __bu.__o); +} + +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_s16_x3 (int16_t * __a, int16x4x3_t __b) +{ + union { int16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3v4hi ((__builtin_neon_hi *) __a, __bu.__o); +} + +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_s32_x3 (int32_t * __a, int32x2x3_t __b) +{ + union { int32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3v2si ((__builtin_neon_si *) __a, __bu.__o); +} + +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_s64_x3 (int64_t * __a, int64x1x3_t __b) +{ + union { int64x1x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3di ((__builtin_neon_di *) __a, __bu.__o); +} + #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) __extension__ extern __inline void __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) @@ -11345,6 +11385,24 @@ vst1_f32_x2 (float32_t * __a, float32x2x2_t __b) __builtin_neon_vst1_x2v2sf ((__builtin_neon_sf *) __a, __bu.__o); } +#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_f16_x3 (float16_t * __a, float16x4x3_t __b) +{ + union { float16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3v4hf (__a, __bu.__o); +} +#endif + +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_f32_x3 (float32_t * __a, float32x2x3_t __b) +{ + union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3v2sf ((__builtin_neon_sf *) __a, __bu.__o); +} + __extension__ extern __inline void __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vst1_u8 (uint8_t * __a, uint8x8_t __b) @@ -11405,6 +11463,38 @@ vst1_u64_x2 (uint64_t * __a, uint64x1x2_t __b) __builtin_neon_vst1_x2di ((__builtin_neon_di *) __a, __bu.__o); } +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_u8_x3 (uint8_t * __a, uint8x8x3_t __b) +{ + union { uint8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3v8qi ((__builtin_neon_qi *) __a, __bu.__o); +} + +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_u16_x3 (uint16_t * __a, uint16x4x3_t __b) +{ + union { uint16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3v4hi ((__builtin_neon_hi *) __a, __bu.__o); +} + +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_u32_x3 (uint32_t * __a, uint32x2x3_t __b) +{ + union { uint32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3v2si ((__builtin_neon_si *) __a, __bu.__o); +} + +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_u64_x3 (uint64_t * __a, uint64x1x3_t __b) +{ + union { uint64x1x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3di ((__builtin_neon_di *) __a, __bu.__o); +} + __extension__ extern __inline void __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vst1_p8 (poly8_t * __a, poly8x8_t __b) @@ -11435,6 +11525,22 @@ vst1_p16_x2 (poly16_t * __a, poly16x4x2_t __b) __builtin_neon_vst1_x2v4hi ((__builtin_neon_hi *) __a, __bu.__o); } +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_p8_x3 (poly8_t * __a, poly8x8x3_t __b) +{ + union { poly8x8x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3v8qi ((__builtin_neon_qi *) __a, __bu.__o); +} + +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_p16_x3 (poly16_t * __a, poly16x4x3_t __b) +{ + union { poly16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3v4hi ((__builtin_neon_hi *) __a, __bu.__o); +} + #pragma GCC push_options #pragma GCC target ("fpu=crypto-neon-fp-armv8") __extension__ extern __inline void @@ -20184,6 +20290,14 @@ vst1_bf16_x2 (bfloat16_t * __a, bfloat16x4x2_t __b) __builtin_neon_vst1_x2v4hf ((__builtin_neon_bf *) __a, __bu.__o); } +__extension__ extern __inline void +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vst1_bf16_x3 (bfloat16_t * __a, bfloat16x4x3_t __b) +{ + union { bfloat16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; + __builtin_neon_vst1_x3v4hf ((__builtin_neon_bf *) __a, __bu.__o); +} + __extension__ extern __inline void __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vst1q_bf16 (bfloat16_t * __a, bfloat16x8_t __b) diff --git a/gcc/config/arm/arm_neon_builtins.def b/gcc/config/arm/arm_neon_builtins.def index 7aef6f958cd..e33b3429f65 100644 --- a/gcc/config/arm/arm_neon_builtins.def +++ b/gcc/config/arm/arm_neon_builtins.def @@ -309,6 +309,7 @@ VAR12 (LOAD1LANE, vld1_lane, VAR10 (LOAD1, vld1_dup, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) VAR7 (STORE1, vst1_x2, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf) +VAR7 (STORE1, vst1_x3, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf) VAR14 (STORE1, vst1, v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di, v4bf, v8bf) diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 7a10e2cb61e..3d1d2aa7d06 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -5135,6 +5135,16 @@ if (BYTES_BIG_ENDIAN) [(set_attr "type" "neon_store1_2reg<q>")] ) +(define_insn "neon_vst1_x3<mode>" + [(set (match_operand:EI 0 "neon_struct_operand" "=Um") + (unspec:EI [(match_operand:EI 1 "s_register_operand" "w") + (unspec:VDQX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] + UNSPEC_VST1))] + "TARGET_NEON" + "vst1.<V_sz_elem>\t%h1, %A0" + [(set_attr "type" "neon_store1_3reg<q>")] +) + (define_insn "neon_vst1<mode>" [(set (match_operand:VDQX 0 "neon_struct_operand" "=Um") (unspec:VDQX [(match_operand:VDQX 1 "s_register_operand" "w")] diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c index 575897fa422..5f820a6a496 100644 --- a/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c @@ -60,8 +60,63 @@ void test_vst1_p16_x2 (poly16_t * ptr, poly16x4x2_t val) vst1_p16_x2 (ptr, val); } +void test_vst1_u8_x3 (uint8_t * ptr, uint8x8x3_t val) +{ + vst1_u8_x3 (ptr, val); +} + +void test_vst1_u16_x3 (uint16_t * ptr, uint16x4x3_t val) +{ + vst1_u16_x3 (ptr, val); +} + +void test_vst1_u32_x3 (uint32_t * ptr, uint32x2x3_t val) +{ + vst1_u32_x3 (ptr, val); +} + +void test_vst1_u64_x3 (uint64_t * ptr, uint64x1x3_t val) +{ + vst1_u64_x3 (ptr, val); +} + +void test_vst1_s8_x3 (int8_t * ptr, int8x8x3_t val) +{ + vst1_s8_x3 (ptr, val); +} + +void test_vst1_s16_x3 (int16_t * ptr, int16x4x3_t val) +{ + vst1_s16_x3 (ptr, val); +} + +void test_vst1_s32_x3 (int32_t * ptr, int32x2x3_t val) +{ + vst1_s32_x3 (ptr, val); +} + +void test_vst1_s64_x3 (int64_t * ptr, int64x1x3_t val) +{ + vst1_s64_x3 (ptr, val); +} + +void test_vst1_f32_x3 (float32_t * ptr, float32x2x3_t val) +{ + vst1_f32_x3 (ptr, val); +} + +void test_vst1_p8_x3 (poly8_t * ptr, poly8x8x3_t val) +{ + vst1_p8_x3 (ptr, val); +} + +void test_vst1_p16_x3 (poly16_t * ptr, poly16x4x3_t val) +{ + vst1_p16_x3 (ptr, val); +} + -/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */ -/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */ -/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */ -/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */ +/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */ +/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */ +/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */ +/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 4 } } */ diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c index 213fd20ee65..a3a00ead468 100644 --- a/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c @@ -10,4 +10,9 @@ void test_vst1_bf16_x2 (bfloat16_t * ptr, bfloat16x4x2_t val) vst1_bf16_x2 (ptr, val); } -/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */ +void test_vst1_bf16_x3 (bfloat16_t * ptr, bfloat16x4x3_t val) +{ + vst1_bf16_x3 (ptr, val); +} + +/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c index 523aec92db2..0a6863e24c6 100644 --- a/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c @@ -10,4 +10,9 @@ void test_vst1_f16_x2 (float16_t * ptr, float16x4x2_t val) vst1_f16_x2 (ptr, val); } -/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */ +void test_vst1_f16_x3 (float16_t * ptr, float16x4x3_t val) +{ + vst1_f16_x3 (ptr, val); +} + +/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c index f590ebd7b94..5dbd6049bc9 100644 --- a/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c @@ -10,4 +10,9 @@ void test_vst1_p64_x2 (poly64_t * ptr, poly64x1x2_t val) vst1_p64_x2 (ptr, val); } -/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 1 } } */ \ No newline at end of file +void test_vst1_p64_x3 (poly64_t * ptr, poly64x1x3_t val) +{ + vst1_p64_x3 (ptr, val); +} + +/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */ \ No newline at end of file
From: Ezra Sitorus <ezra.sitorus@arm.com> This patch is part of a series of patches implementing the _xN variants of the vst1 intrinsic for arm32. This patch adds the _x3 variants of the vst1 intrinsic. ACLE documents are at https://developer.arm.com/documentation/ihi0053/latest/ ISA documents are at https://developer.arm.com/documentation/ddi0487/latest/ gcc/ChangeLog: * config/arm/arm_neon.h (vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New. (vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New. (vst1_f16_x3, vst1_f32_x3): New. (vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New. (vst1_bf16_x3): New. * config/arm/arm_neon_builtins.def (vst1_x3): New entries. * config/arm/neon.md (vst1_x3<mode>): New. gcc/testsuite/ChangeLog: * gcc.target/arm/simd/vst1_base_xN_1.c: Add new test. * gcc.target/arm/simd/vst1_bf16_xN_1.c: Add new test. * gcc.target/arm/simd/vst1_fp16_xN_1.c: Add new test. * gcc.target/arm/simd/vst1_p64_xN_1.c: Add new test. --- gcc/config/arm/arm_neon.h | 114 ++++++++++++++++++ gcc/config/arm/arm_neon_builtins.def | 1 + gcc/config/arm/neon.md | 10 ++ .../gcc.target/arm/simd/vst1_base_xN_1.c | 63 +++++++++- .../gcc.target/arm/simd/vst1_bf16_xN_1.c | 7 +- .../gcc.target/arm/simd/vst1_fp16_xN_1.c | 7 +- .../gcc.target/arm/simd/vst1_p64_xN_1.c | 7 +- 7 files changed, 202 insertions(+), 7 deletions(-)