From patchwork Thu Aug 31 06:24:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fei Gao X-Patchwork-Id: 1828124 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Rbrjc3dXmz1yfX for ; Thu, 31 Aug 2023 16:24:36 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8D88C3856DF2 for ; Thu, 31 Aug 2023 06:24:34 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from azure-sdnproxy.icoremail.net (azure-sdnproxy.icoremail.net [20.231.56.155]) by sourceware.org (Postfix) with ESMTP id 83CD13858C62 for ; Thu, 31 Aug 2023 06:24:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 83CD13858C62 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=eswincomputing.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=eswincomputing.com Received: from localhost.localdomain (unknown [10.12.130.31]) by app2 (Coremail) with SMTP id EggMCgBHjpQMMvBkKORCAA--.4640S6; Thu, 31 Aug 2023 14:24:13 +0800 (CST) From: Fei Gao To: gcc-patches@gcc.gnu.org Subject: [PATCH 2/2] [RISC-V] Enalble zcmp for -Os Date: Thu, 31 Aug 2023 06:24:02 +0000 Message-Id: <20230831062402.6810-3-gaofei@eswincomputing.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230831062402.6810-1-gaofei@eswincomputing.com> References: <20230831062402.6810-1-gaofei@eswincomputing.com> X-CM-TRANSID: EggMCgBHjpQMMvBkKORCAA--.4640S6 X-Coremail-Antispam: 1UD129KBjvAXoW3KryfXFykWw4ruw47CFW5trb_yoW8Jr48Ao WfKF1DX3WFgF1akrykCwnrGr18WrWvgw4YqFsY9F98G3WkXr1Yva4ayw4xZFyfXrySgFW8 Za95ZayUZayvg3WDn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUOe7AC8VAFwI0_Wr0E3s1l1xkIjI8I6I8E6xAIw20EY4v20xva j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r15M28IrcIa0x kI8VCY1x0267AKxVW8JVW5JwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l84AC jcxK6xIIjxv20xvE14v26w1j6s0DM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4UJVWxJr 1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_GcCE3s1l e2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI 8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwAC jcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lc7CjxVAKzI0EY4vE52x082 I5MxkIecxEwVCm-wCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s02 6c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw 0_GFylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvE c7CjxVAFwI0_Gr0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14 v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x 0pRLqXdUUUUU= X-CM-SenderInfo: xjdrwv3l6h245lqf0zpsxwx03jof0z/ X-Spam-Status: No, score=-10.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, LIKELY_SPAM_BODY, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, URIBL_BLACK autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kito.cheng@gmail.com, jiawei@iscas.ac.cn Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Enalble zcmp for -Os and shrink-warp-separate for the speed perfered optimization by default. To force enabling zcmp multi push/pop in speed perfered case, fno-shrink-wrap-separate has to be explictly given. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_avoid_shrink_wrapping_separate): wrap the condition check in riscv_avoid_shrink_wrapping_separate. (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate is active. (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate gcc/testsuite/ChangeLog: * gcc.target/riscv/rv32e_zcmp.c: remove -fno-shrink-wrap-separate * gcc.target/riscv/rv32i_zcmp.c: likewise * gcc.target/riscv/zcmp_push_fpr.c: likewise * gcc.target/riscv/zcmp_stack_alignment.c: likewise * gcc.target/riscv/zcmp_shrink_wrap_separate.c: New test. * gcc.target/riscv/zcmp_shrink_wrap_separate2.c: New test. --- gcc/config/riscv/riscv.cc | 21 ++++- gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c | 2 +- gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c | 2 +- .../gcc.target/riscv/zcmp_push_fpr.c | 2 +- .../riscv/zcmp_shrink_wrap_separate.c | 93 +++++++++++++++++++ .../riscv/zcmp_shrink_wrap_separate2.c | 93 +++++++++++++++++++ .../gcc.target/riscv/zcmp_stack_alignment.c | 2 +- 7 files changed, 207 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_separate.c create mode 100644 gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_separate2.c diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 78600ba73b6..3f71000c88b 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -64,6 +64,7 @@ along with GCC; see the file COPYING3. If not see #include "cfghooks.h" #include "cfgloop.h" #include "cfgrtl.h" +#include "shrink-wrap.h" #include "sel-sched.h" #include "sched-int.h" #include "fold-const.h" @@ -372,6 +373,7 @@ static const struct riscv_tune_param optimize_size_tune_info = { false, /* use_divmod_expansion */ }; +static bool riscv_avoid_shrink_wrapping_separate (); static tree riscv_handle_fndecl_attribute (tree *, tree, tree, int, bool *); static tree riscv_handle_type_attribute (tree *, tree, tree, int, bool *); @@ -5569,7 +5571,9 @@ riscv_avoid_multi_push (const struct riscv_frame_info *frame) { if (!TARGET_ZCMP || crtl->calls_eh_return || frame_pointer_needed || cfun->machine->interrupt_handler_p || cfun->machine->varargs_size != 0 - || crtl->args.pretend_args_size != 0 || flag_shrink_wrap_separate + || crtl->args.pretend_args_size != 0 + || (use_shrink_wrapping_separate () + && !riscv_avoid_shrink_wrapping_separate ()) || (frame->mask & ~MULTI_PUSH_GPR_MASK)) return true; @@ -6831,6 +6835,17 @@ riscv_epilogue_uses (unsigned int regno) return false; } +static bool +riscv_avoid_shrink_wrapping_separate () +{ + if (riscv_use_save_libcall (&cfun->machine->frame) + || cfun->machine->interrupt_handler_p + || !cfun->machine->frame.gp_sp_offset.is_constant ()) + return true; + + return false; +} + /* Implement TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS. */ static sbitmap @@ -6840,9 +6855,7 @@ riscv_get_separate_components (void) sbitmap components = sbitmap_alloc (FIRST_PSEUDO_REGISTER); bitmap_clear (components); - if (riscv_use_save_libcall (&cfun->machine->frame) - || cfun->machine->interrupt_handler_p - || !cfun->machine->frame.gp_sp_offset.is_constant ()) + if (riscv_avoid_shrink_wrapping_separate ()) return components; offset = cfun->machine->frame.gp_sp_offset.to_constant (); diff --git a/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c b/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c index 394459c4ed7..50e443573ad 100644 --- a/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c +++ b/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options " -Os -march=rv32e_zca_zcmp -mabi=ilp32e -mcmodel=medlow -fno-shrink-wrap-separate" } */ +/* { dg-options " -Os -march=rv32e_zca_zcmp -mabi=ilp32e -mcmodel=medlow" } */ /* { dg-skip-if "" { *-*-* } {"-O0" "-O1" "-O2" "-Og" "-O3" "-Oz" "-flto"} } */ /* { dg-final { check-function-bodies "**" "" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c b/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c index f00338a9d17..ea562b7a233 100644 --- a/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c +++ b/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options " -Os -march=rv32imaf_zca_zcmp -mabi=ilp32f -mcmodel=medlow -fno-shrink-wrap-separate" }*/ +/* { dg-options " -Os -march=rv32imaf_zca_zcmp -mabi=ilp32f -mcmodel=medlow" }*/ /* { dg-skip-if "" { *-*-* } {"-O0" "-O1" "-O2" "-Og" "-O3" "-Oz" "-flto"} } */ /* { dg-final { check-function-bodies "**" "" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zcmp_push_fpr.c b/gcc/testsuite/gcc.target/riscv/zcmp_push_fpr.c index 530b35b53dd..c9d79205b31 100644 --- a/gcc/testsuite/gcc.target/riscv/zcmp_push_fpr.c +++ b/gcc/testsuite/gcc.target/riscv/zcmp_push_fpr.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64imafd_zicsr_zifencei_zca_zcmp -mabi=lp64d -Os -fno-shrink-wrap-separate" } */ +/* { dg-options "-march=rv64imafd_zicsr_zifencei_zca_zcmp -mabi=lp64d -Os" } */ /* { dg-skip-if "" { *-*-* } {"-O0" "-O1" "-O2" "-Og" "-O3" "-Oz" "-flto"} } */ typedef struct diff --git a/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_separate.c b/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_separate.c new file mode 100644 index 00000000000..035bc32cec5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_separate.c @@ -0,0 +1,93 @@ +/* { dg-do compile } */ +/* { dg-options " -O2 -march=rv32imaf_zca_zcmp -mabi=ilp32f" } */ +/* { dg-skip-if "" { *-*-* } {"-O0" "-O1" "-Os" "-Og" "-O3" "-Oz" "-flto"} } */ + +typedef struct MAT_PARAMS_S +{ + int N; + signed short *A; + signed short *B; + signed int *C; +} mat_params; + +typedef struct CORE_PORTABLE_S +{ + unsigned char portable_id; +} core_portable; + +typedef struct RESULTS_S +{ + /* inputs */ + signed short seed1; /* Initializing seed */ + signed short seed2; /* Initializing seed */ + signed short seed3; /* Initializing seed */ + void *memblock[4]; /* Pointer to safe memory location */ + unsigned int size; /* Size of the data */ + unsigned int iterations; /* Number of iterations to execute */ + unsigned int execs; /* Bitmask of operations to execute */ + struct list_head_s *list; + mat_params mat; + /* outputs */ + unsigned short crc; + unsigned short crclist; + unsigned short crcmatrix; + unsigned short crcstate; + signed short err; + /* ultithread specific */ + core_portable port; +} core_results; + +extern signed short +core_bench_state (unsigned int, void *, signed short, signed short, + signed short, unsigned short); + +extern signed short +core_bench_matrix (mat_params *, signed short, unsigned short); + +extern unsigned short +crcu16 (signed short, unsigned short); + +signed short +calc_func (signed short *pdata, core_results *res) +{ + signed short data = *pdata; + signed short retval; + unsigned char optype + = (data >> 7) + & 1; /* bit 7 indicates if the function result has been cached */ + if (optype) /* if cached, use cache */ + return (data & 0x007f); + else + { /* otherwise calculate and cache the result */ + signed short flag + = data & 0x7; /* bits 0-2 is type of function to perform */ + signed short dtype + = ((data >> 3) & 0xf); /* bits 3-6 is specific data for the operation */ + dtype |= dtype << 4; /* replicate the lower 4 bits to get an 8b value */ + switch (flag) + { + case 0: + if (dtype < 0x22) /* set min period for bit corruption */ + dtype = 0x22; + retval = core_bench_state (res->size, res->memblock[3], res->seed1, + res->seed2, dtype, res->crc); + if (res->crcstate == 0) + res->crcstate = retval; + break; + case 1: + retval = core_bench_matrix (&(res->mat), dtype, res->crc); + if (res->crcmatrix == 0) + res->crcmatrix = retval; + break; + default: + retval = data; + break; + } + res->crc = crcu16 (retval, res->crc); + retval &= 0x007f; + *pdata = (data & 0xff00) | 0x0080 | retval; /* cache the result */ + return retval; + } +} + +/* { dg-final { scan-assembler-not "cm\.push" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_separate2.c b/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_separate2.c new file mode 100644 index 00000000000..47c78886052 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_separate2.c @@ -0,0 +1,93 @@ +/* { dg-do compile } */ +/* { dg-options " -O2 -fno-shrink-wrap-separate -march=rv32imaf_zca_zcmp -mabi=ilp32f" } */ +/* { dg-skip-if "" { *-*-* } {"-O0" "-O1" "-Os" "-Og" "-O3" "-Oz" "-flto"} } */ + +typedef struct MAT_PARAMS_S +{ + int N; + signed short *A; + signed short *B; + signed int *C; +} mat_params; + +typedef struct CORE_PORTABLE_S +{ + unsigned char portable_id; +} core_portable; + +typedef struct RESULTS_S +{ + /* inputs */ + signed short seed1; /* Initializing seed */ + signed short seed2; /* Initializing seed */ + signed short seed3; /* Initializing seed */ + void *memblock[4]; /* Pointer to safe memory location */ + unsigned int size; /* Size of the data */ + unsigned int iterations; /* Number of iterations to execute */ + unsigned int execs; /* Bitmask of operations to execute */ + struct list_head_s *list; + mat_params mat; + /* outputs */ + unsigned short crc; + unsigned short crclist; + unsigned short crcmatrix; + unsigned short crcstate; + signed short err; + /* ultithread specific */ + core_portable port; +} core_results; + +extern signed short +core_bench_state (unsigned int, void *, signed short, signed short, + signed short, unsigned short); + +extern signed short +core_bench_matrix (mat_params *, signed short, unsigned short); + +extern unsigned short +crcu16 (signed short, unsigned short); + +signed short +calc_func (signed short *pdata, core_results *res) +{ + signed short data = *pdata; + signed short retval; + unsigned char optype + = (data >> 7) + & 1; /* bit 7 indicates if the function result has been cached */ + if (optype) /* if cached, use cache */ + return (data & 0x007f); + else + { /* otherwise calculate and cache the result */ + signed short flag + = data & 0x7; /* bits 0-2 is type of function to perform */ + signed short dtype + = ((data >> 3) & 0xf); /* bits 3-6 is specific data for the operation */ + dtype |= dtype << 4; /* replicate the lower 4 bits to get an 8b value */ + switch (flag) + { + case 0: + if (dtype < 0x22) /* set min period for bit corruption */ + dtype = 0x22; + retval = core_bench_state (res->size, res->memblock[3], res->seed1, + res->seed2, dtype, res->crc); + if (res->crcstate == 0) + res->crcstate = retval; + break; + case 1: + retval = core_bench_matrix (&(res->mat), dtype, res->crc); + if (res->crcmatrix == 0) + res->crcmatrix = retval; + break; + default: + retval = data; + break; + } + res->crc = crcu16 (retval, res->crc); + retval &= 0x007f; + *pdata = (data & 0xff00) | 0x0080 | retval; /* cache the result */ + return retval; + } +} + +/* { dg-final { scan-assembler "cm\.push" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c b/gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c index 2f2fa55baac..f7d8f446b79 100644 --- a/gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c +++ b/gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options " -O0 -march=rv32e_zca_zcb_zcmp -mabi=ilp32e -mcmodel=medlow -fomit-frame-pointer -fno-shrink-wrap-separate" } */ +/* { dg-options " -O0 -march=rv32e_zca_zcb_zcmp -mabi=ilp32e -mcmodel=medlow -fomit-frame-pointer" } */ /* { dg-skip-if "" { *-*-* } {"-O2" "-O1" "-Os" "-Og" "-O3" "-Oz" "-flto"} } */ /* { dg-final { check-function-bodies "**" "" } } */