diff mbox series

[2/2] Adjust rtx_cost for DF/SFmode AND/IOR/XOR/ANDN operations.

Message ID 20230706011816.3543708-2-hongtao.liu@intel.com
State New
Headers show
Series [1/2,x86] Add pre_reload splitter to detect fp min/max pattern. | expand

Commit Message

Liu, Hongtao July 6, 2023, 1:18 a.m. UTC
They should have same cost as vector mode since both generate
pand/pandn/pxor/por instruction.

Bootstrapped and regtested on x86_64-pc-linu-gnu{-m32,}.
Ok for trunk?

gcc/ChangeLog:

	* config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
	DF/SFmode AND/IOR/XOR/ANDN operations.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/pr110170-2.c: New test.
---
 gcc/config/i386/i386.cc                    |  6 ++++--
 gcc/testsuite/gcc.target/i386/pr110170-2.c | 16 ++++++++++++++++
 2 files changed, 20 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr110170-2.c

Comments

Uros Bizjak July 6, 2023, 5:54 a.m. UTC | #1
On Thu, Jul 6, 2023 at 3:20 AM liuhongt <hongtao.liu@intel.com> wrote:
>
> They should have same cost as vector mode since both generate
> pand/pandn/pxor/por instruction.
>
> Bootstrapped and regtested on x86_64-pc-linu-gnu{-m32,}.
> Ok for trunk?
>
> gcc/ChangeLog:
>
>         * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
>         DF/SFmode AND/IOR/XOR/ANDN operations.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/i386/pr110170-2.c: New test.

OK.

Thanks,
Uros.

> ---
>  gcc/config/i386/i386.cc                    |  6 ++++--
>  gcc/testsuite/gcc.target/i386/pr110170-2.c | 16 ++++++++++++++++
>  2 files changed, 20 insertions(+), 2 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/i386/pr110170-2.c
>
> diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
> index d4ff56ee8dd..fe31acd7646 100644
> --- a/gcc/config/i386/i386.cc
> +++ b/gcc/config/i386/i386.cc
> @@ -21153,7 +21153,8 @@ ix86_rtx_costs (rtx x, machine_mode mode, int outer_code_i, int opno,
>
>      case IOR:
>      case XOR:
> -      if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
> +      if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
> +         || SSE_FLOAT_MODE_P (mode))
>         *total = ix86_vec_cost (mode, cost->sse_op);
>        else if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)
>         *total = cost->add * 2;
> @@ -21167,7 +21168,8 @@ ix86_rtx_costs (rtx x, machine_mode mode, int outer_code_i, int opno,
>           *total = cost->lea;
>           return true;
>         }
> -      else if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
> +      else if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
> +              || SSE_FLOAT_MODE_P (mode))
>         {
>           /* pandn is a single instruction.  */
>           if (GET_CODE (XEXP (x, 0)) == NOT)
> diff --git a/gcc/testsuite/gcc.target/i386/pr110170-2.c b/gcc/testsuite/gcc.target/i386/pr110170-2.c
> new file mode 100644
> index 00000000000..d43e322fc49
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr110170-2.c
> @@ -0,0 +1,16 @@
> +/* { dg-do compile { target { ! ia32 } } } */
> +/* { dg-options "-msse2 -O2 -mfpmath=sse" } */
> +/* { dg-final { scan-assembler-not "comi" } }  */
> +
> +double
> +foo (double* a, double* b, double c, double d)
> +{
> +  return *a < *b ? c : d;
> +}
> +
> +float
> +foo1 (float* a, float* b, float c, float d)
> +{
> +  return *a < *b ? c : d;
> +}
> +
> --
> 2.39.1.388.g2fc9e9ca3c
>
diff mbox series

Patch

diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index d4ff56ee8dd..fe31acd7646 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -21153,7 +21153,8 @@  ix86_rtx_costs (rtx x, machine_mode mode, int outer_code_i, int opno,
 
     case IOR:
     case XOR:
-      if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
+      if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
+	  || SSE_FLOAT_MODE_P (mode))
 	*total = ix86_vec_cost (mode, cost->sse_op);
       else if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)
 	*total = cost->add * 2;
@@ -21167,7 +21168,8 @@  ix86_rtx_costs (rtx x, machine_mode mode, int outer_code_i, int opno,
 	  *total = cost->lea;
 	  return true;
 	}
-      else if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
+      else if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
+	       || SSE_FLOAT_MODE_P (mode))
 	{
 	  /* pandn is a single instruction.  */
 	  if (GET_CODE (XEXP (x, 0)) == NOT)
diff --git a/gcc/testsuite/gcc.target/i386/pr110170-2.c b/gcc/testsuite/gcc.target/i386/pr110170-2.c
new file mode 100644
index 00000000000..d43e322fc49
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr110170-2.c
@@ -0,0 +1,16 @@ 
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-msse2 -O2 -mfpmath=sse" } */
+/* { dg-final { scan-assembler-not "comi" } }  */
+
+double
+foo (double* a, double* b, double c, double d)
+{
+  return *a < *b ? c : d;
+}
+
+float
+foo1 (float* a, float* b, float c, float d)
+{
+  return *a < *b ? c : d;
+}
+