| Message ID | 20230626013105.18788-2-hongtao.liu@intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/3] Use cvt_op to save intermediate type operand instead of "subtle" vec_dest. | expand |
On Mon, Jun 26, 2023 at 3:31 AM liuhongt via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > > > Hmm, good question. GENERIC has a direct truncation to unsigned char > > > for example, the C standard generally says if the integral part cannot > > > be represented then the behavior is undefined. So I think we should be > > > safe here (0x1.0p32 doesn't fit an int). > > > > We should be following Annex F (unspecified value plus "invalid" exception > > for out-of-range floating-to-integer conversions rather than undefined > > behavior). But we don't achieve that very well at present (see bug 93806 > > comments 27-29 for examples of how such conversions produce wobbly > > values). > > That would mean guarding this with !flag_trapping_math would be the appropriate > thing to do. > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,} and aarch64-linux-gnu. > Ok for trunk? OK. Thanks, Richard. > gcc/ChangeLog: > > PR tree-optimization/110371 > PR tree-optimization/110018 > * tree-vect-stmts.cc (vectorizable_conversion): Don't use > intermiediate type for FIX_TRUNC_EXPR when ftrapping-math. > > gcc/testsuite/ChangeLog: > > * gcc.target/i386/pr110018-1.c: Add -fno-trapping-math to dg-options. > * gcc.target/i386/pr110018-2.c: Ditto. > --- > gcc/testsuite/gcc.target/i386/pr110018-1.c | 2 +- > gcc/testsuite/gcc.target/i386/pr110018-2.c | 2 +- > gcc/tree-vect-stmts.cc | 3 ++- > 3 files changed, 4 insertions(+), 3 deletions(-) > > diff --git a/gcc/testsuite/gcc.target/i386/pr110018-1.c b/gcc/testsuite/gcc.target/i386/pr110018-1.c > index b6a3be7b7a2..24eeca60f6f 100644 > --- a/gcc/testsuite/gcc.target/i386/pr110018-1.c > +++ b/gcc/testsuite/gcc.target/i386/pr110018-1.c > @@ -1,5 +1,5 @@ > /* { dg-do compile } */ > -/* { dg-options "-mavx512fp16 -mavx512vl -O2 -mavx512dq" } */ > +/* { dg-options "-mavx512fp16 -mavx512vl -O2 -mavx512dq -fno-trapping-math" } */ > /* { dg-final { scan-assembler-times {(?n)vcvttp[dsh]2[dqw]} 5 } } */ > /* { dg-final { scan-assembler-times {(?n)vcvt[dqw]*2p[dsh]} 5 } } */ > > diff --git a/gcc/testsuite/gcc.target/i386/pr110018-2.c b/gcc/testsuite/gcc.target/i386/pr110018-2.c > index a663e074698..9a2d9e17894 100644 > --- a/gcc/testsuite/gcc.target/i386/pr110018-2.c > +++ b/gcc/testsuite/gcc.target/i386/pr110018-2.c > @@ -1,5 +1,5 @@ > /* { dg-do compile } */ > -/* { dg-options "-mavx512fp16 -mavx512vl -O2 -mavx512dq" } */ > +/* { dg-options "-mavx512fp16 -mavx512vl -O2 -mavx512dq -fno-trapping-math" } */ > /* { dg-final { scan-assembler-times {(?n)vcvttp[dsh]2[dqw]} 5 } } */ > /* { dg-final { scan-assembler-times {(?n)vcvt[dqw]*2p[dsh]} 5 } } */ > > diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc > index 1748555a625..bf61461939b 100644 > --- a/gcc/tree-vect-stmts.cc > +++ b/gcc/tree-vect-stmts.cc > @@ -5263,7 +5263,8 @@ vectorizable_conversion (vec_info *vinfo, > if ((code == FLOAT_EXPR > && GET_MODE_SIZE (lhs_mode) > GET_MODE_SIZE (rhs_mode)) > || (code == FIX_TRUNC_EXPR > - && GET_MODE_SIZE (rhs_mode) > GET_MODE_SIZE (lhs_mode))) > + && GET_MODE_SIZE (rhs_mode) > GET_MODE_SIZE (lhs_mode) > + && !flag_trapping_math)) > { > bool float_expr_p = code == FLOAT_EXPR; > scalar_mode imode = float_expr_p ? rhs_mode : lhs_mode; > -- > 2.39.1.388.g2fc9e9ca3c >
diff --git a/gcc/testsuite/gcc.target/i386/pr110018-1.c b/gcc/testsuite/gcc.target/i386/pr110018-1.c index b6a3be7b7a2..24eeca60f6f 100644 --- a/gcc/testsuite/gcc.target/i386/pr110018-1.c +++ b/gcc/testsuite/gcc.target/i386/pr110018-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mavx512fp16 -mavx512vl -O2 -mavx512dq" } */ +/* { dg-options "-mavx512fp16 -mavx512vl -O2 -mavx512dq -fno-trapping-math" } */ /* { dg-final { scan-assembler-times {(?n)vcvttp[dsh]2[dqw]} 5 } } */ /* { dg-final { scan-assembler-times {(?n)vcvt[dqw]*2p[dsh]} 5 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr110018-2.c b/gcc/testsuite/gcc.target/i386/pr110018-2.c index a663e074698..9a2d9e17894 100644 --- a/gcc/testsuite/gcc.target/i386/pr110018-2.c +++ b/gcc/testsuite/gcc.target/i386/pr110018-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mavx512fp16 -mavx512vl -O2 -mavx512dq" } */ +/* { dg-options "-mavx512fp16 -mavx512vl -O2 -mavx512dq -fno-trapping-math" } */ /* { dg-final { scan-assembler-times {(?n)vcvttp[dsh]2[dqw]} 5 } } */ /* { dg-final { scan-assembler-times {(?n)vcvt[dqw]*2p[dsh]} 5 } } */ diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc index 1748555a625..bf61461939b 100644 --- a/gcc/tree-vect-stmts.cc +++ b/gcc/tree-vect-stmts.cc @@ -5263,7 +5263,8 @@ vectorizable_conversion (vec_info *vinfo, if ((code == FLOAT_EXPR && GET_MODE_SIZE (lhs_mode) > GET_MODE_SIZE (rhs_mode)) || (code == FIX_TRUNC_EXPR - && GET_MODE_SIZE (rhs_mode) > GET_MODE_SIZE (lhs_mode))) + && GET_MODE_SIZE (rhs_mode) > GET_MODE_SIZE (lhs_mode) + && !flag_trapping_math)) { bool float_expr_p = code == FLOAT_EXPR; scalar_mode imode = float_expr_p ? rhs_mode : lhs_mode;