Message ID | 20230612094458.1230512-1-juzhe.zhong@rivai.ai |
---|---|
State | New |
Headers | show |
Series | [V2] RISC-V: Add ZVFHMIN block autovec testcase | expand |
> +/* We can't enable FP16 NEG/PLUS/MINUS/MULT/DIV auto-vectorization when -march="*zvfhmin*". */ > +/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 0 "vect" } } */ Thanks. OK from my side. Regards Robin
LGTM too, thanks On Mon, Jun 12, 2023 at 5:46 PM Robin Dapp via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > > +/* We can't enable FP16 NEG/PLUS/MINUS/MULT/DIV auto-vectorization when -march="*zvfhmin*". */ > > +/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 0 "vect" } } */ > > Thanks. OK from my side. > > Regards > Robin
Committed, thanks Kito and Robin. Pan -----Original Message----- From: Gcc-patches <gcc-patches-bounces+pan2.li=intel.com@gcc.gnu.org> On Behalf Of Kito Cheng via Gcc-patches Sent: Monday, June 12, 2023 8:19 PM To: Robin Dapp <rdapp.gcc@gmail.com> Cc: juzhe.zhong@rivai.ai; gcc-patches@gcc.gnu.org; kito.cheng@sifive.com; palmer@dabbelt.com; palmer@rivosinc.com; jeffreyalaw@gmail.com Subject: Re: [PATCH V2] RISC-V: Add ZVFHMIN block autovec testcase LGTM too, thanks On Mon, Jun 12, 2023 at 5:46 PM Robin Dapp via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > > +/* We can't enable FP16 NEG/PLUS/MINUS/MULT/DIV auto-vectorization > > +when -march="*zvfhmin*". */ > > +/* { dg-final { scan-tree-dump-times "vectorized 1 loops in > > +function" 0 "vect" } } */ > > Thanks. OK from my side. > > Regards > Robin
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zvfhmin-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zvfhmin-1.c new file mode 100644 index 00000000000..08da48d0270 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zvfhmin-1.c @@ -0,0 +1,35 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv_zvfhmin -mabi=ilp32d --param riscv-autovec-preference=scalable -fdump-tree-vect-details" } */ + +void f0 (_Float16 * __restrict a, _Float16 * __restrict b, int n) +{ + for (int i = 0; i < n; i++) + a[i] = -b[i]; +} + +void f1 (_Float16 * __restrict a, _Float16 * __restrict b, int n) +{ + for (int i = 0; i < n; i++) + a[i] = a[i]+b[i]; +} + +void f2 (_Float16 * __restrict a, _Float16 * __restrict b, int n) +{ + for (int i = 0; i < n; i++) + a[i] = a[i]-b[i]; +} + +void f3 (_Float16 * __restrict a, _Float16 * __restrict b, int n) +{ + for (int i = 0; i < n; i++) + a[i] = a[i]*b[i]; +} + +void f4 (_Float16 * __restrict a, _Float16 * __restrict b, int n) +{ + for (int i = 0; i < n; i++) + a[i] = a[i]/b[i]; +} + +/* We can't enable FP16 NEG/PLUS/MINUS/MULT/DIV auto-vectorization when -march="*zvfhmin*". */ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 0 "vect" } } */
From: Juzhe-Zhong <juzhe.zhong@rivai.ai> To be safe, add ZVFHMIN autovec block testcase to make sure we won't enable autovec in ZVFHMIN by mistakes. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/zvfhmin-1.c: New test. --- .../gcc.target/riscv/rvv/autovec/zvfhmin-1.c | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zvfhmin-1.c