| Message ID | 20230118031305.69740-1-juzhe.zhong@rivai.ai |
|---|---|
| State | New |
| Headers | show |
| Series | RISC-V: Refine function args of some functions. | expand |
committed, thanks! On Wed, Jan 18, 2023 at 11:13 AM <juzhe.zhong@rivai.ai> wrote: > From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai> > > gcc/ChangeLog: > > * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function > args. > (emit_vsetvl_insn): Ditto. > > --- > gcc/config/riscv/riscv-vsetvl.cc | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/gcc/config/riscv/riscv-vsetvl.cc > b/gcc/config/riscv/riscv-vsetvl.cc > index 728a32dacd6..e11751f00af 100644 > --- a/gcc/config/riscv/riscv-vsetvl.cc > +++ b/gcc/config/riscv/riscv-vsetvl.cc > @@ -580,7 +580,7 @@ has_vector_insn (function *fn) > > /* Emit vsetvl instruction. */ > static rtx > -gen_vsetvl_pat (enum vsetvl_type insn_type, vl_vtype_info info, rtx vl) > +gen_vsetvl_pat (enum vsetvl_type insn_type, const vl_vtype_info &info, > rtx vl) > { > rtx avl = info.get_avl (); > rtx sew = gen_int_mode (info.get_sew (), Pmode); > @@ -600,7 +600,7 @@ gen_vsetvl_pat (enum vsetvl_type insn_type, > vl_vtype_info info, rtx vl) > } > > static rtx > -gen_vsetvl_pat (rtx_insn *rinsn, const vector_insn_info info) > +gen_vsetvl_pat (rtx_insn *rinsn, const vector_insn_info &info) > { > rtx new_pat; > if (vsetvl_insn_p (rinsn) || vlmax_avl_p (info.get_avl ())) > @@ -617,7 +617,7 @@ gen_vsetvl_pat (rtx_insn *rinsn, const > vector_insn_info info) > > static void > emit_vsetvl_insn (enum vsetvl_type insn_type, enum emit_type emit_type, > - vl_vtype_info info, rtx vl, rtx_insn *rinsn) > + const vl_vtype_info &info, rtx vl, rtx_insn *rinsn) > { > rtx pat = gen_vsetvl_pat (insn_type, info, vl); > if (dump_file) > -- > 2.36.3 > > >
diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index 728a32dacd6..e11751f00af 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -580,7 +580,7 @@ has_vector_insn (function *fn) /* Emit vsetvl instruction. */ static rtx -gen_vsetvl_pat (enum vsetvl_type insn_type, vl_vtype_info info, rtx vl) +gen_vsetvl_pat (enum vsetvl_type insn_type, const vl_vtype_info &info, rtx vl) { rtx avl = info.get_avl (); rtx sew = gen_int_mode (info.get_sew (), Pmode); @@ -600,7 +600,7 @@ gen_vsetvl_pat (enum vsetvl_type insn_type, vl_vtype_info info, rtx vl) } static rtx -gen_vsetvl_pat (rtx_insn *rinsn, const vector_insn_info info) +gen_vsetvl_pat (rtx_insn *rinsn, const vector_insn_info &info) { rtx new_pat; if (vsetvl_insn_p (rinsn) || vlmax_avl_p (info.get_avl ())) @@ -617,7 +617,7 @@ gen_vsetvl_pat (rtx_insn *rinsn, const vector_insn_info info) static void emit_vsetvl_insn (enum vsetvl_type insn_type, enum emit_type emit_type, - vl_vtype_info info, rtx vl, rtx_insn *rinsn) + const vl_vtype_info &info, rtx vl, rtx_insn *rinsn) { rtx pat = gen_vsetvl_pat (insn_type, info, vl); if (dump_file)
From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai> gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args. (emit_vsetvl_insn): Ditto. --- gcc/config/riscv/riscv-vsetvl.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)