From patchwork Tue Jan 3 06:55:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "juzhe.zhong@rivai.ai" X-Patchwork-Id: 1720905 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NmNmg6g43z23db for ; Tue, 3 Jan 2023 17:56:02 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 69ADE3857803 for ; Tue, 3 Jan 2023 06:55:58 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbg156.qq.com (smtpbg156.qq.com [15.184.82.18]) by sourceware.org (Postfix) with ESMTPS id D2EBD3858D1E for ; Tue, 3 Jan 2023 06:55:40 +0000 (GMT) X-QQ-mid: bizesmtp80t1672728932t6cpdhl5 Received: from rios-cad5.localdomain ( [58.60.1.11]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 03 Jan 2023 14:55:31 +0800 (CST) X-QQ-SSF: 01400000000000E0L000000A0000000 X-QQ-FEAT: CR3LFp2JE4lFACpxLK+ij5h3N1hidx5KWH6ylWXfmsmHOG7DFjQjl3Rj6dL31 uijhbzncS931tBJingJu3v9p8dZsTZuPW1ebe2LB0xUljtooGlRnWz2kRWyCVJiOoT3Ps80 ATIFTcKmjFdEf1Ay1qDOBv4S5WtAO/1pfuLLCeFspXe5YYSBttcHy1k+RnB/zqdLjLRQJyG BxKlSiXxm1Y7T6QtPghhsislxmRM/ANIrpGd1c+EYyrZ77vgh4kdnX75VIKVQ9BRObMWwCZ p//UHd1a8v0S7JnEoqbVzwShwpoCd0ciSo2sYowplk8FjqBGNXNG4DRD7p7bt3vdBJoNt6Z BpEHnk9Ll/6MiyAVb+P4+lTgcZmmapyS0uUKsbBHFGm4uS4wWqsWkHOe8Cj/PxTgbWFypN8 wae9cYuU0fs= X-QQ-GoodBg: 2 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, Ju-Zhe Zhong Subject: [PATCH] RISC-V: Fix bugs for refine vsetvl a5, zero into vsetvl zero, zero incorrectly Date: Tue, 3 Jan 2023 14:55:30 +0800 Message-Id: <20230103065530.142443-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, RCVD_IN_PBL, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" From: Ju-Zhe Zhong Currently we support this optimization: bb 0: vsetvli a5,zero,e32,mf2 bb 1: vsetvli a5,zero,e64,m1 --> vsetvli zero,zero,e64,m1 According RVV ISA, we can do this optimization only if both RATIO and AVL are equal. However, current VSETVL PASS missed the check of AVL. This patch add this condition check to fix bugs. gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function. (pass_vsetvl::can_refine_vsetvl_p): Add AVL check. (pass_vsetvl::commit_vsetvls): Ditto. * config/riscv/riscv-vsetvl.h: New function declaration. --- gcc/config/riscv/riscv-vsetvl.cc | 35 ++++++++++++++++++++++++++++---- gcc/config/riscv/riscv-vsetvl.h | 3 +++ 2 files changed, 34 insertions(+), 4 deletions(-) diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index ce1e9e3609f..1afe76304fb 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -1440,6 +1440,29 @@ vector_infos_manager::all_same_ratio_p (sbitmap bitdata) const return true; } +bool +vector_infos_manager::all_same_avl_p (const basic_block cfg_bb, + sbitmap bitdata) const +{ + if (bitmap_empty_p (bitdata)) + return false; + + const auto &block_info = vector_block_infos[cfg_bb->index]; + if (!block_info.local_dem.demand_p (DEMAND_AVL)) + return true; + + avl_info avl = block_info.local_dem.get_avl_info (); + unsigned int bb_index; + sbitmap_iterator sbi; + + EXECUTE_IF_SET_IN_BITMAP (bitdata, 0, bb_index, sbi) + { + if (vector_exprs[bb_index]->get_avl_info () != avl) + return false; + } + return true; +} + size_t vector_infos_manager::expr_set_num (sbitmap bitdata) const { @@ -2113,6 +2136,10 @@ pass_vsetvl::can_refine_vsetvl_p (const basic_block cfg_bb, uint8_t ratio) const m_vector_manager->vector_avin[cfg_bb->index])) return false; + if (!m_vector_manager->all_same_avl_p ( + cfg_bb, m_vector_manager->vector_avin[cfg_bb->index])) + return false; + size_t expr_id = bitmap_first_set_bit (m_vector_manager->vector_avin[cfg_bb->index]); if (m_vector_manager->vector_exprs[expr_id]->get_ratio () != ratio) @@ -2227,11 +2254,11 @@ pass_vsetvl::commit_vsetvls (void) insn_info *insn = require->get_insn (); vector_insn_info prev_info = vector_insn_info (); - if (m_vector_manager->all_same_ratio_p ( - m_vector_manager->vector_avout[eg->src->index])) + sbitmap bitdata = m_vector_manager->vector_avout[eg->src->index]; + if (m_vector_manager->all_same_ratio_p (bitdata) + && m_vector_manager->all_same_avl_p (eg->dest, bitdata)) { - size_t first = bitmap_first_set_bit ( - m_vector_manager->vector_avout[eg->src->index]); + size_t first = bitmap_first_set_bit (bitdata); prev_info = *m_vector_manager->vector_exprs[first]; } diff --git a/gcc/config/riscv/riscv-vsetvl.h b/gcc/config/riscv/riscv-vsetvl.h index 6f27004fab1..c8218a6ff00 100644 --- a/gcc/config/riscv/riscv-vsetvl.h +++ b/gcc/config/riscv/riscv-vsetvl.h @@ -333,6 +333,9 @@ public: /* Get all relaxer expression id for corresponding vector info. */ auto_vec get_all_available_exprs (const vector_insn_info &) const; + /* Return true if all expression set in bitmap are same AVL. */ + bool all_same_avl_p (const basic_block, sbitmap) const; + /* Return true if all expression set in bitmap are same ratio. */ bool all_same_ratio_p (sbitmap) const;