From patchwork Sun Nov 13 20:48:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philipp Tomsich X-Patchwork-Id: 1703337 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=vrull.eu header.i=@vrull.eu header.a=rsa-sha256 header.s=google header.b=SO+EecdS; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N9Pgg2KNJz1yhv for ; Mon, 14 Nov 2022 07:49:19 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 55E583885501 for ; Sun, 13 Nov 2022 20:49:17 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by sourceware.org (Postfix) with ESMTPS id 7847A389839B for ; Sun, 13 Nov 2022 20:49:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7847A389839B Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-lf1-x133.google.com with SMTP id b3so16281866lfv.2 for ; Sun, 13 Nov 2022 12:49:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=q+kJzHS/6RrJp6hdRWT1ODD4KwbOtWAuCjFBl2cYyV4=; b=SO+EecdS/6ML+rynVclvp/YW+AmSEloLd8bpN0HaZPCAGrIeRzzhSRfqoMejJz/IgR c270QSeMvI0PG4ETrkAkvBEZQ0r8Uwamuxf2P9KvuEegkPahts7pFq5iS4fwRJNXO4Vc C+m5glSrF0/TENoq9aBLNJPmY0Z0SyEzRCICL/L4n+wRah0QRs56roakcuR0Na4PYQDU 3qx5UfFbM9LICDm6W04qEvPGR4vUWHycr1xxPTbBbUkJAvBOrN1Lrukh4bGa9stti2UK fabR1d5URaVf0J52z92TfHKSK3ay+a+rDwdS1YP9wWkNQmL2AEui+yH8BGYgOPqNXHgz ym1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=q+kJzHS/6RrJp6hdRWT1ODD4KwbOtWAuCjFBl2cYyV4=; b=386QV7PwF8TbyLbi62u21varTQiLzAzoaof7vaR1CA4qBYopF6tk1w5DyL+9jOJehn It1XO+uL5m5J1GZnjqxI3HXJ1Hr4mL8U2IXZ0DpmpnycYEh/v4yzJrSbUsJrD/rJfDMH OEFlQ4gF51eM9zRj1LnxRxMkq0dMv3EUsEE03lU8nZ6DdhI9WjVA7lfwcibkY98h90PA Pd088bmv89AueFmJ1xDL6842xK+lGNDUqBZFZUbNBRV3tgymV7Q+zpLXvBxCdo2Tlg5w OF2UADebl6xV8AQMH86lLdlPYuhfJwaoEM54Ku6VeaMWUmTpng3igbZvnM/2wGr/Bjh0 Vcpw== X-Gm-Message-State: ANoB5pnz2GFkG3aEXYRYyK6NJXcniz52LjKGgTWy+eEPX+JMsRwjkRKb Co11nS6wxMiVF+uGP/ZK1kFkLvbvh/obMOxn X-Google-Smtp-Source: AA0mqf7y3PdVZZ0D7Jv8qSFx1COOr+sjUKIjU0wfluvAeNlZFzFVYnfZr+PYecAhlzKlI/CxWT73fw== X-Received: by 2002:ac2:4294:0:b0:4a2:46f6:6cee with SMTP id m20-20020ac24294000000b004a246f66ceemr3670739lfh.642.1668372541743; Sun, 13 Nov 2022 12:49:01 -0800 (PST) Received: from ubuntu-focal.. ([2a01:4f9:3a:1e26::2]) by smtp.gmail.com with ESMTPSA id p5-20020a2ea405000000b00278e9c0d3a2sm1434207ljn.33.2022.11.13.12.49.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Nov 2022 12:49:01 -0800 (PST) From: Philipp Tomsich To: gcc-patches@gcc.gnu.org Cc: Christoph Muellner , Kito Cheng , Vineet Gupta , Jeff Law , Palmer Dabbelt , Philipp Tomsich Subject: [PATCH] RISC-V: Handle "(a & twobits) == singlebit" in branches using Zbs Date: Sun, 13 Nov 2022 21:48:58 +0100 Message-Id: <20221113204858.4062163-1-philipp.tomsich@vrull.eu> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, JMQ_SPF_NEUTRAL, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Use Zbs when generating a sequence for "if ((a & twobits) == singlebit) ..." that can be expressed as bexti + bexti + andn. gcc/ChangeLog: * config/riscv/bitmanip.md (*branch_mask_twobits_equals_singlebit): Handle "if ((a & T) == C)" using Zbs, when T has 2 bits set and C has one of these tow bits set. * config/riscv/predicates.md (const_twobits_operand): New predicate. gcc/testsuite/ChangeLog: * gcc.target/riscv/zbs-if_then_else-01.c: New test. Signed-off-by: Philipp Tomsich --- gcc/config/riscv/bitmanip.md | 42 +++++++++++++++++++ gcc/config/riscv/predicates.md | 5 +++ .../gcc.target/riscv/zbs-if_then_else-01.c | 20 +++++++++ 3 files changed, 67 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-if_then_else-01.c diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md index 7a8f4e35880..2cea394671f 100644 --- a/gcc/config/riscv/bitmanip.md +++ b/gcc/config/riscv/bitmanip.md @@ -690,3 +690,45 @@ "TARGET_ZBS" [(set (match_dup 0) (zero_extract:X (match_dup 1) (const_int 1) (match_dup 2))) (set (match_dup 0) (xor:X (match_dup 0) (const_int 1)))]) + +;; IF_THEN_ELSE: test for 2 bits of opposite polarity +(define_insn_and_split "*branch_mask_twobits_equals_singlebit" + [(set (pc) + (if_then_else (match_operator 1 "equality_operator" + [(and:X (match_operand:X 2 "register_operand" "r") + (match_operand:X 3 "const_twobits_operand" "i")) + (match_operand:X 4 "single_bit_mask_operand" "i")]) + (label_ref (match_operand 0 "" "")) + (pc))) + (clobber (match_scratch:X 5 "=&r")) + (clobber (match_scratch:X 6 "=&r"))] + "TARGET_ZBS && TARGET_ZBB && !SMALL_OPERAND (INTVAL (operands[3]))" + "#" + "&& reload_completed" + [(set (match_dup 5) (zero_extract:X (match_dup 2) + (const_int 1) + (match_dup 8))) + (set (match_dup 6) (zero_extract:X (match_dup 2) + (const_int 1) + (match_dup 9))) + (set (match_dup 6) (and:X (not:X (match_dup 6)) (match_dup 5))) + (set (pc) (if_then_else (match_op_dup 1 [(match_dup 6) (const_int 0)]) + (label_ref (match_dup 0)) + (pc)))] +{ + unsigned HOST_WIDE_INT twobits_mask = UINTVAL (operands[3]); + unsigned HOST_WIDE_INT singlebit_mask = UINTVAL (operands[4]); + + /* Make sure that the reference value has one of the bits of the mask set */ + if ((twobits_mask & singlebit_mask) == 0) + FAIL; + + int setbit = ctz_hwi (singlebit_mask); + int clearbit = ctz_hwi (twobits_mask & ~singlebit_mask); + + operands[1] = gen_rtx_fmt_ee (GET_CODE (operands[1]) == NE ? EQ : NE, + mode, operands[6], GEN_INT(0)); + + operands[8] = GEN_INT (setbit); + operands[9] = GEN_INT (clearbit); +}) diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md index 490bff688a7..6e34829a59b 100644 --- a/gcc/config/riscv/predicates.md +++ b/gcc/config/riscv/predicates.md @@ -321,6 +321,11 @@ (and (match_code "const_int") (match_test "popcount_hwi (~UINTVAL (op)) == 2"))) +;; A CONST_INT operand that has exactly two bits set. +(define_predicate "const_twobits_operand" + (and (match_code "const_int") + (match_test "popcount_hwi (UINTVAL (op)) == 2"))) + ;; A CONST_INT operand that fits into the unsigned half of a ;; signed-immediate after the top bit has been cleared. (define_predicate "uimm_extra_bit_operand" diff --git a/gcc/testsuite/gcc.target/riscv/zbs-if_then_else-01.c b/gcc/testsuite/gcc.target/riscv/zbs-if_then_else-01.c new file mode 100644 index 00000000000..d249a841ff9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zbs-if_then_else-01.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zbb_zbs -mabi=lp64" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O1" } } */ + +void g(); + +void f1 (long a) +{ + if ((a & ((1ul << 33) | (1 << 4))) == (1ul << 33)) + g(); +} + +void f2 (long a) +{ + if ((a & 0x12) == 0x10) + g(); +} + +/* { dg-final { scan-assembler-times "bexti\t" 2 } } */ +/* { dg-final { scan-assembler-times "andn\t" 1 } } */