Message ID | 20221109000631.2814859-1-philipp.tomsich@vrull.eu |
---|---|
State | New |
Headers | show |
Series | [v2] RISC-V: No extensions for SImode min/max against safe constant | expand |
On 11/8/22 17:06, Philipp Tomsich wrote: > Optimize the common case of a SImode min/max against a constant > that is safe both for sign- and zero-extension. > E.g., consider the case > int f(unsigned int* a) > { > const int C = 1000; > return *a * 3 > C ? C : *a * 3; > } > where the constant C will yield the same result in DImode whether > sign- or zero-extended. > > This should eventually go away once the lowering to RTL smartens up > and considers the precision/signedness and the value-ranges of the > operands to MIN_EXPR nad MAX_EXPR. > > gcc/ChangeLog: > > * config/riscv/bitmanip.md (*minmax): Additional pattern for > min/max against constants that are extension-invariant. > * config/riscv/iterators.md (minmax_optab): Add an iterator > that has only min and max rtl. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/zbb-min-max-02.c: New test. Ok jeff
Applied to master. Thanks! --Philipp. On Fri, 18 Nov 2022 at 21:11, Jeff Law <jeffreyalaw@gmail.com> wrote: > > On 11/8/22 17:06, Philipp Tomsich wrote: > > Optimize the common case of a SImode min/max against a constant > > that is safe both for sign- and zero-extension. > > E.g., consider the case > > int f(unsigned int* a) > > { > > const int C = 1000; > > return *a * 3 > C ? C : *a * 3; > > } > > where the constant C will yield the same result in DImode whether > > sign- or zero-extended. > > > > This should eventually go away once the lowering to RTL smartens up > > and considers the precision/signedness and the value-ranges of the > > operands to MIN_EXPR nad MAX_EXPR. > > > > gcc/ChangeLog: > > > > * config/riscv/bitmanip.md (*minmax): Additional pattern for > > min/max against constants that are extension-invariant. > > * config/riscv/iterators.md (minmax_optab): Add an iterator > > that has only min and max rtl. > > > > gcc/testsuite/ChangeLog: > > > > * gcc.target/riscv/zbb-min-max-02.c: New test. > > Ok > > jeff > > >
diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md index dddd3422c43..bb23ceb86d9 100644 --- a/gcc/config/riscv/bitmanip.md +++ b/gcc/config/riscv/bitmanip.md @@ -360,6 +360,24 @@ "<bitmanip_insn>\t%0,%1,%2" [(set_attr "type" "bitmanip")]) +;; Optimize the common case of a SImode min/max against a constant +;; that is safe both for sign- and zero-extension. +(define_insn_and_split "*minmax" + [(set (match_operand:DI 0 "register_operand" "=r") + (sign_extend:DI + (subreg:SI + (bitmanip_minmax:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r")) + (match_operand:DI 2 "immediate_operand" "i")) + 0))) + (clobber (match_scratch:DI 3 "=&r")) + (clobber (match_scratch:DI 4 "=&r"))] + "TARGET_64BIT && TARGET_ZBB && sext_hwi (INTVAL (operands[2]), 32) >= 0" + "#" + "&& reload_completed" + [(set (match_dup 3) (sign_extend:DI (match_dup 1))) + (set (match_dup 4) (match_dup 2)) + (set (match_dup 0) (<minmax_optab>:DI (match_dup 3) (match_dup 4)))]) + ;; ZBS extension. (define_insn "*bset<mode>" diff --git a/gcc/config/riscv/iterators.md b/gcc/config/riscv/iterators.md index 50380ecfac9..cbbf61f6514 100644 --- a/gcc/config/riscv/iterators.md +++ b/gcc/config/riscv/iterators.md @@ -213,6 +213,10 @@ [(plus "add") (ior "or") (xor "xor") (and "and")]) ; bitmanip code attributes +(define_code_attr minmax_optab [(smin "smin") + (smax "smax") + (umin "umin") + (umax "umax")]) (define_code_attr bitmanip_optab [(smin "smin") (smax "smax") (umin "umin") diff --git a/gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c b/gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c new file mode 100644 index 00000000000..b462859f10f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zba_zbb -mabi=lp64" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Os" "-Oz" "-Og" } } */ + +int f(unsigned int* a) +{ + const int C = 1000; + return *a * 3 > C ? C : *a * 3; +} + +/* { dg-final { scan-assembler-times "minu" 1 } } */ +/* { dg-final { scan-assembler-times "sext.w" 1 } } */ +/* { dg-final { scan-assembler-not "zext.w" } } */ +
Optimize the common case of a SImode min/max against a constant that is safe both for sign- and zero-extension. E.g., consider the case int f(unsigned int* a) { const int C = 1000; return *a * 3 > C ? C : *a * 3; } where the constant C will yield the same result in DImode whether sign- or zero-extended. This should eventually go away once the lowering to RTL smartens up and considers the precision/signedness and the value-ranges of the operands to MIN_EXPR nad MAX_EXPR. gcc/ChangeLog: * config/riscv/bitmanip.md (*minmax): Additional pattern for min/max against constants that are extension-invariant. * config/riscv/iterators.md (minmax_optab): Add an iterator that has only min and max rtl. gcc/testsuite/ChangeLog: * gcc.target/riscv/zbb-min-max-02.c: New test. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> --- Changes in v2: - fixes the use of minmax_optab (was: bitmanip_optab), which is a change that dropped off the cherry-pick on the previous submission gcc/config/riscv/bitmanip.md | 18 ++++++++++++++++++ gcc/config/riscv/iterators.md | 4 ++++ .../gcc.target/riscv/zbb-min-max-02.c | 14 ++++++++++++++ 3 files changed, 36 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c