diff mbox series

RISC-V: bitmanip: use bexti for "(a & (1 << BIT_NO)) ? 0 : -1"

Message ID 20221108195547.2701347-1-philipp.tomsich@vrull.eu
State New
Headers show
Series RISC-V: bitmanip: use bexti for "(a & (1 << BIT_NO)) ? 0 : -1" | expand

Commit Message

Philipp Tomsich Nov. 8, 2022, 7:55 p.m. UTC 
Consider creating a polarity-reversed mask from a set-bit (i.e., if
the bit is set, produce all-ones; otherwise: all-zeros).  Using Zbb,
this can be expressed as bexti, followed by an addi of minus-one.  To
enable the combiner to discover this opportunity, we need to split the
canonical expression for "(a & (1 << BIT_NO)) ? 0 : -1" into a form
combinable into bexti.

Consider the function:
    long f(long a)
    {
      return (a & (1 << BIT_NO)) ? 0 : -1;
    }
This produces the following sequence prior to this change:
	andi	a0,a0,16
	seqz	a0,a0
	neg	a0,a0
	ret
Following this change, it results in:
	bexti	a0,a0,4
	addi	a0,a0,-1
	ret

gcc/ChangeLog:

	* config/riscv/bitmanip.md: Add a splitter to generate
          polarity-reversed masks from a set bit using bexti + addi.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/zbs-bexti.c: New test.

---

 gcc/config/riscv/bitmanip.md               | 13 +++++++++++++
 gcc/testsuite/gcc.target/riscv/zbs-bexti.c | 14 ++++++++++++++
 2 files changed, 27 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bexti.c

Comments

Jeff Law Nov. 17, 2022, 2:43 p.m. UTC | #1 
On 11/8/22 12:55, Philipp Tomsich wrote:
> Consider creating a polarity-reversed mask from a set-bit (i.e., if
> the bit is set, produce all-ones; otherwise: all-zeros).  Using Zbb,
> this can be expressed as bexti, followed by an addi of minus-one.  To
> enable the combiner to discover this opportunity, we need to split the
> canonical expression for "(a & (1 << BIT_NO)) ? 0 : -1" into a form
> combinable into bexti.
>
> Consider the function:
>      long f(long a)
>      {
>        return (a & (1 << BIT_NO)) ? 0 : -1;
>      }
> This produces the following sequence prior to this change:
> 	andi	a0,a0,16
> 	seqz	a0,a0
> 	neg	a0,a0
> 	ret
> Following this change, it results in:
> 	bexti	a0,a0,4
> 	addi	a0,a0,-1
> 	ret
>
> gcc/ChangeLog:
>
> 	* config/riscv/bitmanip.md: Add a splitter to generate
>            polarity-reversed masks from a set bit using bexti + addi.
>
> gcc/testsuite/ChangeLog:
>
> 	* gcc.target/riscv/zbs-bexti.c: New test.

OK


Jeff
Philipp Tomsich Nov. 17, 2022, 3:25 p.m. UTC | #2 
Committed to master. Thanks!
Philipp.

On Thu, 17 Nov 2022 at 15:43, Jeff Law <jeffreyalaw@gmail.com> wrote:
>
>
> On 11/8/22 12:55, Philipp Tomsich wrote:
> > Consider creating a polarity-reversed mask from a set-bit (i.e., if
> > the bit is set, produce all-ones; otherwise: all-zeros).  Using Zbb,
> > this can be expressed as bexti, followed by an addi of minus-one.  To
> > enable the combiner to discover this opportunity, we need to split the
> > canonical expression for "(a & (1 << BIT_NO)) ? 0 : -1" into a form
> > combinable into bexti.
> >
> > Consider the function:
> >      long f(long a)
> >      {
> >        return (a & (1 << BIT_NO)) ? 0 : -1;
> >      }
> > This produces the following sequence prior to this change:
> >       andi    a0,a0,16
> >       seqz    a0,a0
> >       neg     a0,a0
> >       ret
> > Following this change, it results in:
> >       bexti   a0,a0,4
> >       addi    a0,a0,-1
> >       ret
> >
> > gcc/ChangeLog:
> >
> >       * config/riscv/bitmanip.md: Add a splitter to generate
> >            polarity-reversed masks from a set bit using bexti + addi.
> >
> > gcc/testsuite/ChangeLog:
> >
> >       * gcc.target/riscv/zbs-bexti.c: New test.
>
> OK
>
>
> Jeff
>
>
diff mbox series

Patch

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index d26f3567182..30dabdf8ddc 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -394,3 +394,16 @@ 
   "TARGET_ZBS && UINTVAL (operands[2]) < GET_MODE_BITSIZE (<MODE>mode)"
   "bexti\t%0,%1,%2"
   [(set_attr "type" "bitmanip")])
+
+;; We can create a polarity-reversed mask (i.e. bit N -> { set = 0, clear = -1 })
+;; using a bext(i) followed by an addi instruction.
+;; This splits the canonical representation of "(a & (1 << BIT_NO)) ? 0 : -1".
+(define_split
+  [(set (match_operand:GPR 0 "register_operand")
+       (neg:GPR (eq:GPR (zero_extract:GPR (match_operand:GPR 1 "register_operand")
+                                          (const_int 1)
+                                          (match_operand 2))
+                        (const_int 0))))]
+  "TARGET_ZBS"
+  [(set (match_dup 0) (zero_extract:GPR (match_dup 1) (const_int 1) (match_dup 2)))
+   (set (match_dup 0) (plus:GPR (match_dup 0) (const_int -1)))])
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bexti.c b/gcc/testsuite/gcc.target/riscv/zbs-bexti.c
new file mode 100644
index 00000000000..99e3b58309c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zbs-bexti.c
@@ -0,0 +1,14 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zbs -mabi=lp64 -O2" } */
+
+/* bexti */
+#define BIT_NO  4
+
+long
+foo0 (long a)
+{
+  return (a & (1 << BIT_NO)) ? 0 : -1;
+}
+
+/* { dg-final { scan-assembler "bexti" } } */
+/* { dg-final { scan-assembler "addi" } } */