@@ -529,17 +529,19 @@ (define_expand "divv2sf3"
(match_operand:V2SF 2 "register_operand")))]
"TARGET_MMX_WITH_SSE"
{
- rtx op0 = lowpart_subreg (V4SFmode, operands[0],
- GET_MODE (operands[0]));
- rtx op1 = lowpart_subreg (V4SFmode, operands[1],
- GET_MODE (operands[1]));
+ rtx op1 = lowpart_subreg (V4SFmode, force_reg (V2SFmode, operands[1]),
+ V2SFmode);
rtx op2 = gen_rtx_VEC_CONCAT (V4SFmode, operands[2],
force_reg (V2SFmode, CONST1_RTX (V2SFmode)));
rtx tmp = gen_reg_rtx (V4SFmode);
emit_insn (gen_rtx_SET (tmp, op2));
+ rtx op0 = gen_reg_rtx (V4SFmode);
+
emit_insn (gen_divv4sf3 (op0, op1, tmp));
+
+ emit_move_insn (operands[0], lowpart_subreg (V2SFmode, op0, V4SFmode));
DONE;
})
@@ -0,0 +1,31 @@
+// PR target/103842
+// { dg-do compile }
+// { dg-options "-O3 -std=c++14" }
+
+void foo (float *);
+struct M {
+ float x[3][3];
+ float *operator[](int i) { return x[i]; }
+ M();
+ M(float f, float g) {
+ x[1][0] = x[1][1] = x[1][2] = f;
+ x[2][0] = g;
+ }
+ void bar();
+ M baz() {
+ M s(x[1][2] - x[1][2], x[1][1] - x[1][1]);
+ float r = s[2][0];
+ if (r)
+ for (int i = 0; i < 3; ++i)
+ for (int j = 0; j < 3; ++j)
+ s[i][j] /= r;
+ for (int i = 0;;) {
+ float *t = s[i];
+ foo(t);
+ }
+ }
+};
+void qux() {
+ M m, i = m.baz(), j = i;
+ j.bar();
+}