diff mbox series

x86: Add -mindirect-branch-cs-prefix

Message ID 20211116185055.3867815-1-hjl.tools@gmail.com
State New
Headers show
Series x86: Add -mindirect-branch-cs-prefix | expand

Commit Message

H.J. Lu Nov. 16, 2021, 6:50 p.m. UTC 
Add -mindirect-branch-cs-prefix to add CS prefix to call and jmp to thunk
via r8-r15 registers when converting indirect call and jump to increase
the instruction length to 6, allowing the non-thunk form to be inlined.

gcc/

	PR target/102952
	* config/i386/i386.c (ix86_output_jmp_thunk_or_indirect): Emit
	CS prefix for -mindirect-branch-cs-prefix.
	(ix86_output_indirect_branch_via_reg): Likewise.
	* config/i386/i386.opt: Add -mindirect-branch-cs-prefix.
	* doc/invoke.texi: Document -mindirect-branch-cs-prefix.

gcc/testsuite/

	PR target/102952
	* gcc.target/i386/indirect-thunk-cs-prefix-1.c: New test.
	* gcc.target/i386/indirect-thunk-cs-prefix-2.c: Likewise.
---
 gcc/config/i386/i386.c                            |  6 ++++++
 gcc/config/i386/i386.opt                          |  4 ++++
 gcc/doc/invoke.texi                               |  8 +++++++-
 .../gcc.target/i386/indirect-thunk-cs-prefix-1.c  | 14 ++++++++++++++
 .../gcc.target/i386/indirect-thunk-cs-prefix-2.c  | 15 +++++++++++++++
 5 files changed, 46 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c

Comments

Uros Bizjak Nov. 17, 2021, 9:09 a.m. UTC | #1 
On Tue, Nov 16, 2021 at 7:51 PM H.J. Lu via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> Add -mindirect-branch-cs-prefix to add CS prefix to call and jmp to thunk
> via r8-r15 registers when converting indirect call and jump to increase
> the instruction length to 6, allowing the non-thunk form to be inlined.
>
> gcc/
>
>         PR target/102952
>         * config/i386/i386.c (ix86_output_jmp_thunk_or_indirect): Emit
>         CS prefix for -mindirect-branch-cs-prefix.
>         (ix86_output_indirect_branch_via_reg): Likewise.
>         * config/i386/i386.opt: Add -mindirect-branch-cs-prefix.
>         * doc/invoke.texi: Document -mindirect-branch-cs-prefix.
>
> gcc/testsuite/
>
>         PR target/102952
>         * gcc.target/i386/indirect-thunk-cs-prefix-1.c: New test.
>         * gcc.target/i386/indirect-thunk-cs-prefix-2.c: Likewise.
> ---
>  gcc/config/i386/i386.c                            |  6 ++++++
>  gcc/config/i386/i386.opt                          |  4 ++++
>  gcc/doc/invoke.texi                               |  8 +++++++-
>  .../gcc.target/i386/indirect-thunk-cs-prefix-1.c  | 14 ++++++++++++++
>  .../gcc.target/i386/indirect-thunk-cs-prefix-2.c  | 15 +++++++++++++++
>  5 files changed, 46 insertions(+), 1 deletion(-)
>  create mode 100644 gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c
>  create mode 100644 gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c
>
> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> index 7e9b7bc347f..0a902d66321 100644
> --- a/gcc/config/i386/i386.c
> +++ b/gcc/config/i386/i386.c
> @@ -15983,6 +15983,9 @@ ix86_output_jmp_thunk_or_indirect (const char *thunk_name, const int regno)
>  {
>    if (thunk_name != NULL)
>      {
> +      if (regno >= FIRST_REX_INT_REG

 REX_INT_REGNO_P

> +         && ix86_indirect_branch_cs_prefix)
> +       fprintf (asm_out_file, "\tcs\n");
>        fprintf (asm_out_file, "\tjmp\t");
>        assemble_name (asm_out_file, thunk_name);
>        putc ('\n', asm_out_file);
> @@ -16036,6 +16039,9 @@ ix86_output_indirect_branch_via_reg (rtx call_op, bool sibcall_p)
>      {
>        if (thunk_name != NULL)
>         {
> +         if (regno >= FIRST_REX_INT_REG

 REX_INT_REGNO_P

> +             && ix86_indirect_branch_cs_prefix)
> +           fprintf (asm_out_file, "\tcs\n");
>           fprintf (asm_out_file, "\tcall\t");
>           assemble_name (asm_out_file, thunk_name);
>           putc ('\n', asm_out_file);
> diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
> index 8d499a5a4df..c5452c49597 100644
> --- a/gcc/config/i386/i386.opt
> +++ b/gcc/config/i386/i386.opt
> @@ -1076,6 +1076,10 @@ Enum(indirect_branch) String(thunk-inline) Value(indirect_branch_thunk_inline)
>  EnumValue
>  Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern)
>
> +mindirect-branch-cs-prefix
> +Target Var(ix86_indirect_branch_cs_prefix) Init(0)
> +Add CS prefix to call and jmp to thunk when converting indirect call and jump.

This is not what the function really does. It adds cs to REX prefixed regs.

> +
>  mindirect-branch-register
>  Target Var(ix86_indirect_branch_register) Init(0)
>  Force indirect call and jump via register.
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index f3b4b467765..c992a7152f5 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -1425,7 +1425,8 @@ See RS/6000 and PowerPC Options.
>  -mstack-protector-guard-symbol=@var{symbol} @gol
>  -mgeneral-regs-only  -mcall-ms2sysv-xlogues -mrelax-cmpxchg-loop @gol
>  -mindirect-branch=@var{choice}  -mfunction-return=@var{choice} @gol
> --mindirect-branch-register -mharden-sls=@var{choice} -mneeded}
> +-mindirect-branch-register -mharden-sls=@var{choice} @gol
> +-mindirect-branch-cs-prefix -mneeded}
>
>  @emph{x86 Windows Options}
>  @gccoptlist{-mconsole  -mcygwin  -mno-cygwin  -mdll @gol
> @@ -32390,6 +32391,11 @@ hardening.  @samp{return} enables SLS hardening for function return.
>  @samp{indirect-branch} enables SLS hardening for indirect branch.
>  @samp{all} enables all SLS hardening.
>
> +@item -mindirect-branch-cs-prefix
> +@opindex mindirect-branch-cs-prefix
> +Add CS prefix to call and jmp to thunk via r8-r15 registers when
> +converting indirect call and jump.
> +
>  @end table
>
>  These @samp{-m} switches are supported in addition to the above
> diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c
> new file mode 100644
> index 00000000000..db2f3416823
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c
> @@ -0,0 +1,14 @@
> +/* { dg-do compile { target { ! ia32 } } } */
> +/* { dg-options "-O2 -ffixed-rax -ffixed-rbx -ffixed-rcx -ffixed-rdx -ffixed-rdi -ffixed-rsi -mindirect-branch-cs-prefix -mindirect-branch=thunk-extern" } */
> +/* { dg-additional-options "-fno-pic" { target { ! *-*-darwin* } } } */
> +
> +extern void (*fptr) (void);
> +
> +void
> +foo (void)
> +{
> +  fptr ();
> +}
> +
> +/* { dg-final { scan-assembler-times "jmp\[ \t\]+_?__x86_indirect_thunk_r\[0-9\]+" 1 } } */
> +/* { dg-final { scan-assembler-times "\tcs" 1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c
> new file mode 100644
> index 00000000000..adfc39a49d4
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c
> @@ -0,0 +1,15 @@
> +/* { dg-do compile { target { ! ia32 } } } */
> +/* { dg-options "-O2 -ffixed-rax -ffixed-rbx -ffixed-rcx -ffixed-rdx -ffixed-rdi -ffixed-rsi -mindirect-branch-cs-prefix -mindirect-branch=thunk-extern" } */
> +/* { dg-additional-options "-fno-pic" { target { ! *-*-darwin* } } } */
> +
> +extern void (*bar) (void);
> +
> +int
> +foo (void)
> +{
> +  bar ();
> +  return 0;
> +}
> +
> +/* { dg-final { scan-assembler-times "call\[ \t\]+_?__x86_indirect_thunk_r\[0-9\]+" 1 } } */
> +/* { dg-final { scan-assembler-times "\tcs" 1 } } */
> --
> 2.33.1
>
H.J. Lu Nov. 17, 2021, 1:57 p.m. UTC | #2 
On Wed, Nov 17, 2021 at 1:10 AM Uros Bizjak <ubizjak@gmail.com> wrote:
>
> On Tue, Nov 16, 2021 at 7:51 PM H.J. Lu via Gcc-patches
> <gcc-patches@gcc.gnu.org> wrote:
> >
> > Add -mindirect-branch-cs-prefix to add CS prefix to call and jmp to thunk
> > via r8-r15 registers when converting indirect call and jump to increase
> > the instruction length to 6, allowing the non-thunk form to be inlined.
> >
> > gcc/
> >
> >         PR target/102952
> >         * config/i386/i386.c (ix86_output_jmp_thunk_or_indirect): Emit
> >         CS prefix for -mindirect-branch-cs-prefix.
> >         (ix86_output_indirect_branch_via_reg): Likewise.
> >         * config/i386/i386.opt: Add -mindirect-branch-cs-prefix.
> >         * doc/invoke.texi: Document -mindirect-branch-cs-prefix.
> >
> > gcc/testsuite/
> >
> >         PR target/102952
> >         * gcc.target/i386/indirect-thunk-cs-prefix-1.c: New test.
> >         * gcc.target/i386/indirect-thunk-cs-prefix-2.c: Likewise.
> > ---
> >  gcc/config/i386/i386.c                            |  6 ++++++
> >  gcc/config/i386/i386.opt                          |  4 ++++
> >  gcc/doc/invoke.texi                               |  8 +++++++-
> >  .../gcc.target/i386/indirect-thunk-cs-prefix-1.c  | 14 ++++++++++++++
> >  .../gcc.target/i386/indirect-thunk-cs-prefix-2.c  | 15 +++++++++++++++
> >  5 files changed, 46 insertions(+), 1 deletion(-)
> >  create mode 100644 gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c
> >  create mode 100644 gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c
> >
> > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> > index 7e9b7bc347f..0a902d66321 100644
> > --- a/gcc/config/i386/i386.c
> > +++ b/gcc/config/i386/i386.c
> > @@ -15983,6 +15983,9 @@ ix86_output_jmp_thunk_or_indirect (const char *thunk_name, const int regno)
> >  {
> >    if (thunk_name != NULL)
> >      {
> > +      if (regno >= FIRST_REX_INT_REG
>
>  REX_INT_REGNO_P

Fixed in the v2 patch.

> > +         && ix86_indirect_branch_cs_prefix)
> > +       fprintf (asm_out_file, "\tcs\n");
> >        fprintf (asm_out_file, "\tjmp\t");
> >        assemble_name (asm_out_file, thunk_name);
> >        putc ('\n', asm_out_file);
> > @@ -16036,6 +16039,9 @@ ix86_output_indirect_branch_via_reg (rtx call_op, bool sibcall_p)
> >      {
> >        if (thunk_name != NULL)
> >         {
> > +         if (regno >= FIRST_REX_INT_REG
>
>  REX_INT_REGNO_P

Fixed in the v2 patch.

> > +             && ix86_indirect_branch_cs_prefix)
> > +           fprintf (asm_out_file, "\tcs\n");
> >           fprintf (asm_out_file, "\tcall\t");
> >           assemble_name (asm_out_file, thunk_name);
> >           putc ('\n', asm_out_file);
> > diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
> > index 8d499a5a4df..c5452c49597 100644
> > --- a/gcc/config/i386/i386.opt
> > +++ b/gcc/config/i386/i386.opt
> > @@ -1076,6 +1076,10 @@ Enum(indirect_branch) String(thunk-inline) Value(indirect_branch_thunk_inline)
> >  EnumValue
> >  Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern)
> >
> > +mindirect-branch-cs-prefix
> > +Target Var(ix86_indirect_branch_cs_prefix) Init(0)
> > +Add CS prefix to call and jmp to thunk when converting indirect call and jump.
>
> This is not what the function really does. It adds cs to REX prefixed regs.

Fixed in the v2 patch.

Thanks.

> > +
> >  mindirect-branch-register
> >  Target Var(ix86_indirect_branch_register) Init(0)
> >  Force indirect call and jump via register.
> > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> > index f3b4b467765..c992a7152f5 100644
> > --- a/gcc/doc/invoke.texi
> > +++ b/gcc/doc/invoke.texi
> > @@ -1425,7 +1425,8 @@ See RS/6000 and PowerPC Options.
> >  -mstack-protector-guard-symbol=@var{symbol} @gol
> >  -mgeneral-regs-only  -mcall-ms2sysv-xlogues -mrelax-cmpxchg-loop @gol
> >  -mindirect-branch=@var{choice}  -mfunction-return=@var{choice} @gol
> > --mindirect-branch-register -mharden-sls=@var{choice} -mneeded}
> > +-mindirect-branch-register -mharden-sls=@var{choice} @gol
> > +-mindirect-branch-cs-prefix -mneeded}
> >
> >  @emph{x86 Windows Options}
> >  @gccoptlist{-mconsole  -mcygwin  -mno-cygwin  -mdll @gol
> > @@ -32390,6 +32391,11 @@ hardening.  @samp{return} enables SLS hardening for function return.
> >  @samp{indirect-branch} enables SLS hardening for indirect branch.
> >  @samp{all} enables all SLS hardening.
> >
> > +@item -mindirect-branch-cs-prefix
> > +@opindex mindirect-branch-cs-prefix
> > +Add CS prefix to call and jmp to thunk via r8-r15 registers when
> > +converting indirect call and jump.
> > +
> >  @end table
> >
> >  These @samp{-m} switches are supported in addition to the above
> > diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c
> > new file mode 100644
> > index 00000000000..db2f3416823
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c
> > @@ -0,0 +1,14 @@
> > +/* { dg-do compile { target { ! ia32 } } } */
> > +/* { dg-options "-O2 -ffixed-rax -ffixed-rbx -ffixed-rcx -ffixed-rdx -ffixed-rdi -ffixed-rsi -mindirect-branch-cs-prefix -mindirect-branch=thunk-extern" } */
> > +/* { dg-additional-options "-fno-pic" { target { ! *-*-darwin* } } } */
> > +
> > +extern void (*fptr) (void);
> > +
> > +void
> > +foo (void)
> > +{
> > +  fptr ();
> > +}
> > +
> > +/* { dg-final { scan-assembler-times "jmp\[ \t\]+_?__x86_indirect_thunk_r\[0-9\]+" 1 } } */
> > +/* { dg-final { scan-assembler-times "\tcs" 1 } } */
> > diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c
> > new file mode 100644
> > index 00000000000..adfc39a49d4
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c
> > @@ -0,0 +1,15 @@
> > +/* { dg-do compile { target { ! ia32 } } } */
> > +/* { dg-options "-O2 -ffixed-rax -ffixed-rbx -ffixed-rcx -ffixed-rdx -ffixed-rdi -ffixed-rsi -mindirect-branch-cs-prefix -mindirect-branch=thunk-extern" } */
> > +/* { dg-additional-options "-fno-pic" { target { ! *-*-darwin* } } } */
> > +
> > +extern void (*bar) (void);
> > +
> > +int
> > +foo (void)
> > +{
> > +  bar ();
> > +  return 0;
> > +}
> > +
> > +/* { dg-final { scan-assembler-times "call\[ \t\]+_?__x86_indirect_thunk_r\[0-9\]+" 1 } } */
> > +/* { dg-final { scan-assembler-times "\tcs" 1 } } */
> > --
> > 2.33.1
> >
diff mbox series

Patch

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 7e9b7bc347f..0a902d66321 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -15983,6 +15983,9 @@  ix86_output_jmp_thunk_or_indirect (const char *thunk_name, const int regno)
 {
   if (thunk_name != NULL)
     {
+      if (regno >= FIRST_REX_INT_REG
+	  && ix86_indirect_branch_cs_prefix)
+	fprintf (asm_out_file, "\tcs\n");
       fprintf (asm_out_file, "\tjmp\t");
       assemble_name (asm_out_file, thunk_name);
       putc ('\n', asm_out_file);
@@ -16036,6 +16039,9 @@  ix86_output_indirect_branch_via_reg (rtx call_op, bool sibcall_p)
     {
       if (thunk_name != NULL)
 	{
+	  if (regno >= FIRST_REX_INT_REG
+	      && ix86_indirect_branch_cs_prefix)
+	    fprintf (asm_out_file, "\tcs\n");
 	  fprintf (asm_out_file, "\tcall\t");
 	  assemble_name (asm_out_file, thunk_name);
 	  putc ('\n', asm_out_file);
diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
index 8d499a5a4df..c5452c49597 100644
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -1076,6 +1076,10 @@  Enum(indirect_branch) String(thunk-inline) Value(indirect_branch_thunk_inline)
 EnumValue
 Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern)
 
+mindirect-branch-cs-prefix
+Target Var(ix86_indirect_branch_cs_prefix) Init(0)
+Add CS prefix to call and jmp to thunk when converting indirect call and jump.
+
 mindirect-branch-register
 Target Var(ix86_indirect_branch_register) Init(0)
 Force indirect call and jump via register.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index f3b4b467765..c992a7152f5 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1425,7 +1425,8 @@  See RS/6000 and PowerPC Options.
 -mstack-protector-guard-symbol=@var{symbol} @gol
 -mgeneral-regs-only  -mcall-ms2sysv-xlogues -mrelax-cmpxchg-loop @gol
 -mindirect-branch=@var{choice}  -mfunction-return=@var{choice} @gol
--mindirect-branch-register -mharden-sls=@var{choice} -mneeded}
+-mindirect-branch-register -mharden-sls=@var{choice} @gol
+-mindirect-branch-cs-prefix -mneeded}
 
 @emph{x86 Windows Options}
 @gccoptlist{-mconsole  -mcygwin  -mno-cygwin  -mdll @gol
@@ -32390,6 +32391,11 @@  hardening.  @samp{return} enables SLS hardening for function return.
 @samp{indirect-branch} enables SLS hardening for indirect branch.
 @samp{all} enables all SLS hardening.
 
+@item -mindirect-branch-cs-prefix
+@opindex mindirect-branch-cs-prefix
+Add CS prefix to call and jmp to thunk via r8-r15 registers when
+converting indirect call and jump.
+
 @end table
 
 These @samp{-m} switches are supported in addition to the above
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c
new file mode 100644
index 00000000000..db2f3416823
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c
@@ -0,0 +1,14 @@ 
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -ffixed-rax -ffixed-rbx -ffixed-rcx -ffixed-rdx -ffixed-rdi -ffixed-rsi -mindirect-branch-cs-prefix -mindirect-branch=thunk-extern" } */
+/* { dg-additional-options "-fno-pic" { target { ! *-*-darwin* } } } */
+
+extern void (*fptr) (void);
+
+void
+foo (void)
+{
+  fptr ();
+}
+
+/* { dg-final { scan-assembler-times "jmp\[ \t\]+_?__x86_indirect_thunk_r\[0-9\]+" 1 } } */
+/* { dg-final { scan-assembler-times "\tcs" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c
new file mode 100644
index 00000000000..adfc39a49d4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c
@@ -0,0 +1,15 @@ 
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -ffixed-rax -ffixed-rbx -ffixed-rcx -ffixed-rdx -ffixed-rdi -ffixed-rsi -mindirect-branch-cs-prefix -mindirect-branch=thunk-extern" } */
+/* { dg-additional-options "-fno-pic" { target { ! *-*-darwin* } } } */
+
+extern void (*bar) (void);
+
+int
+foo (void)
+{
+  bar ();
+  return 0;
+}
+
+/* { dg-final { scan-assembler-times "call\[ \t\]+_?__x86_indirect_thunk_r\[0-9\]+" 1 } } */
+/* { dg-final { scan-assembler-times "\tcs" 1 } } */