Message ID | 20211104011843.97354-1-hongyu.wang@intel.com |
---|---|
State | New |
Headers | show |
Series | i386: Fix wrong result for AMX-TILE intrinsic when parsing expression. | expand |
On Thu, Nov 4, 2021 at 9:19 AM Hongyu Wang via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > Hi, > > _tile_loadd, _tile_stored, _tile_streamloadd intrinsics are defined by > macro, so the parameters should be wrapped by parentheses to accept > expressions. > > Bootstraped/regtested on x86_64-pc-linux-gnu{-m32,} and sde. > > OK for master and backport to GCC11 branch? Could you add a testcase for that? > > gcc/ChangeLog: > > * config/i386/amxtileintrin.h (_tile_loadd_internal): Add > parentheses to base and stride. > (_tile_stream_loadd_internal): Likewise. > (_tile_stored_internal): Likewise. > --- > gcc/config/i386/amxtileintrin.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/gcc/config/i386/amxtileintrin.h b/gcc/config/i386/amxtileintrin.h > index 75d784ad160..3a0a6b44c17 100644 > --- a/gcc/config/i386/amxtileintrin.h > +++ b/gcc/config/i386/amxtileintrin.h > @@ -62,7 +62,7 @@ _tile_release (void) > #define _tile_loadd_internal(dst,base,stride) \ > __asm__ volatile \ > ("{tileloadd\t(%0,%1,1), %%tmm"#dst"|tileloadd\t%%tmm"#dst", [%0+%1*1]}" \ > - :: "r" ((const void*) base), "r" ((long) stride)) > + :: "r" ((const void*) (base)), "r" ((long) (stride))) > > #define _tile_stream_loadd(dst,base,stride) \ > _tile_stream_loadd_internal (dst, base, stride) > @@ -70,7 +70,7 @@ _tile_release (void) > #define _tile_stream_loadd_internal(dst,base,stride) \ > __asm__ volatile \ > ("{tileloaddt1\t(%0,%1,1), %%tmm"#dst"|tileloaddt1\t%%tmm"#dst", [%0+%1*1]}" \ > - :: "r" ((const void*) base), "r" ((long) stride)) > + :: "r" ((const void*) (base)), "r" ((long) (stride))) > > #define _tile_stored(dst,base,stride) \ > _tile_stored_internal (dst, base, stride) > @@ -78,7 +78,7 @@ _tile_release (void) > #define _tile_stored_internal(src,base,stride) \ > __asm__ volatile \ > ("{tilestored\t%%tmm"#src", (%0,%1,1)|tilestored\t[%0+%1*1], %%tmm"#src"}" \ > - :: "r" ((void*) base), "r" ((long) stride) \ > + :: "r" ((void*) (base)), "r" ((long) (stride)) \ > : "memory") > > #define _tile_zero(dst) \ > -- > 2.18.1 >
> Could you add a testcase for that? Yes, updated patch. Hongtao Liu via Gcc-patches <gcc-patches@gcc.gnu.org> 于2021年11月4日周四 上午10:25写道: > > On Thu, Nov 4, 2021 at 9:19 AM Hongyu Wang via Gcc-patches > <gcc-patches@gcc.gnu.org> wrote: > > > > Hi, > > > > _tile_loadd, _tile_stored, _tile_streamloadd intrinsics are defined by > > macro, so the parameters should be wrapped by parentheses to accept > > expressions. > > > > Bootstraped/regtested on x86_64-pc-linux-gnu{-m32,} and sde. > > > > OK for master and backport to GCC11 branch? > Could you add a testcase for that? > > > > gcc/ChangeLog: > > > > * config/i386/amxtileintrin.h (_tile_loadd_internal): Add > > parentheses to base and stride. > > (_tile_stream_loadd_internal): Likewise. > > (_tile_stored_internal): Likewise. > > --- > > gcc/config/i386/amxtileintrin.h | 6 +++--- > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > diff --git a/gcc/config/i386/amxtileintrin.h b/gcc/config/i386/amxtileintrin.h > > index 75d784ad160..3a0a6b44c17 100644 > > --- a/gcc/config/i386/amxtileintrin.h > > +++ b/gcc/config/i386/amxtileintrin.h > > @@ -62,7 +62,7 @@ _tile_release (void) > > #define _tile_loadd_internal(dst,base,stride) \ > > __asm__ volatile \ > > ("{tileloadd\t(%0,%1,1), %%tmm"#dst"|tileloadd\t%%tmm"#dst", [%0+%1*1]}" \ > > - :: "r" ((const void*) base), "r" ((long) stride)) > > + :: "r" ((const void*) (base)), "r" ((long) (stride))) > > > > #define _tile_stream_loadd(dst,base,stride) \ > > _tile_stream_loadd_internal (dst, base, stride) > > @@ -70,7 +70,7 @@ _tile_release (void) > > #define _tile_stream_loadd_internal(dst,base,stride) \ > > __asm__ volatile \ > > ("{tileloaddt1\t(%0,%1,1), %%tmm"#dst"|tileloaddt1\t%%tmm"#dst", [%0+%1*1]}" \ > > - :: "r" ((const void*) base), "r" ((long) stride)) > > + :: "r" ((const void*) (base)), "r" ((long) (stride))) > > > > #define _tile_stored(dst,base,stride) \ > > _tile_stored_internal (dst, base, stride) > > @@ -78,7 +78,7 @@ _tile_release (void) > > #define _tile_stored_internal(src,base,stride) \ > > __asm__ volatile \ > > ("{tilestored\t%%tmm"#src", (%0,%1,1)|tilestored\t[%0+%1*1], %%tmm"#src"}" \ > > - :: "r" ((void*) base), "r" ((long) stride) \ > > + :: "r" ((void*) (base)), "r" ((long) (stride)) \ > > : "memory") > > > > #define _tile_zero(dst) \ > > -- > > 2.18.1 > > > > > -- > BR, > Hongtao
On Thu, Nov 4, 2021 at 11:25 AM Hongyu Wang <wwwhhhyyy333@gmail.com> wrote: > > > Could you add a testcase for that? > > Yes, updated patch. > > Hongtao Liu via Gcc-patches <gcc-patches@gcc.gnu.org> 于2021年11月4日周四 上午10:25写道: > > > > On Thu, Nov 4, 2021 at 9:19 AM Hongyu Wang via Gcc-patches > > <gcc-patches@gcc.gnu.org> wrote: > > > > > > Hi, > > > > > > _tile_loadd, _tile_stored, _tile_streamloadd intrinsics are defined by > > > macro, so the parameters should be wrapped by parentheses to accept > > > expressions. > > > > > > Bootstraped/regtested on x86_64-pc-linux-gnu{-m32,} and sde. > > > > > > OK for master and backport to GCC11 branch? LGTM. > > Could you add a testcase for that? > > > > > > gcc/ChangeLog: > > > > > > * config/i386/amxtileintrin.h (_tile_loadd_internal): Add > > > parentheses to base and stride. > > > (_tile_stream_loadd_internal): Likewise. > > > (_tile_stored_internal): Likewise. > > > --- > > > gcc/config/i386/amxtileintrin.h | 6 +++--- > > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > > > diff --git a/gcc/config/i386/amxtileintrin.h b/gcc/config/i386/amxtileintrin.h > > > index 75d784ad160..3a0a6b44c17 100644 > > > --- a/gcc/config/i386/amxtileintrin.h > > > +++ b/gcc/config/i386/amxtileintrin.h > > > @@ -62,7 +62,7 @@ _tile_release (void) > > > #define _tile_loadd_internal(dst,base,stride) \ > > > __asm__ volatile \ > > > ("{tileloadd\t(%0,%1,1), %%tmm"#dst"|tileloadd\t%%tmm"#dst", [%0+%1*1]}" \ > > > - :: "r" ((const void*) base), "r" ((long) stride)) > > > + :: "r" ((const void*) (base)), "r" ((long) (stride))) > > > > > > #define _tile_stream_loadd(dst,base,stride) \ > > > _tile_stream_loadd_internal (dst, base, stride) > > > @@ -70,7 +70,7 @@ _tile_release (void) > > > #define _tile_stream_loadd_internal(dst,base,stride) \ > > > __asm__ volatile \ > > > ("{tileloaddt1\t(%0,%1,1), %%tmm"#dst"|tileloaddt1\t%%tmm"#dst", [%0+%1*1]}" \ > > > - :: "r" ((const void*) base), "r" ((long) stride)) > > > + :: "r" ((const void*) (base)), "r" ((long) (stride))) > > > > > > #define _tile_stored(dst,base,stride) \ > > > _tile_stored_internal (dst, base, stride) > > > @@ -78,7 +78,7 @@ _tile_release (void) > > > #define _tile_stored_internal(src,base,stride) \ > > > __asm__ volatile \ > > > ("{tilestored\t%%tmm"#src", (%0,%1,1)|tilestored\t[%0+%1*1], %%tmm"#src"}" \ > > > - :: "r" ((void*) base), "r" ((long) stride) \ > > > + :: "r" ((void*) (base)), "r" ((long) (stride)) \ > > > : "memory") > > > > > > #define _tile_zero(dst) \ > > > -- > > > 2.18.1 > > > > > > > > > -- > > BR, > > Hongtao
diff --git a/gcc/config/i386/amxtileintrin.h b/gcc/config/i386/amxtileintrin.h index 75d784ad160..3a0a6b44c17 100644 --- a/gcc/config/i386/amxtileintrin.h +++ b/gcc/config/i386/amxtileintrin.h @@ -62,7 +62,7 @@ _tile_release (void) #define _tile_loadd_internal(dst,base,stride) \ __asm__ volatile \ ("{tileloadd\t(%0,%1,1), %%tmm"#dst"|tileloadd\t%%tmm"#dst", [%0+%1*1]}" \ - :: "r" ((const void*) base), "r" ((long) stride)) + :: "r" ((const void*) (base)), "r" ((long) (stride))) #define _tile_stream_loadd(dst,base,stride) \ _tile_stream_loadd_internal (dst, base, stride) @@ -70,7 +70,7 @@ _tile_release (void) #define _tile_stream_loadd_internal(dst,base,stride) \ __asm__ volatile \ ("{tileloaddt1\t(%0,%1,1), %%tmm"#dst"|tileloaddt1\t%%tmm"#dst", [%0+%1*1]}" \ - :: "r" ((const void*) base), "r" ((long) stride)) + :: "r" ((const void*) (base)), "r" ((long) (stride))) #define _tile_stored(dst,base,stride) \ _tile_stored_internal (dst, base, stride) @@ -78,7 +78,7 @@ _tile_release (void) #define _tile_stored_internal(src,base,stride) \ __asm__ volatile \ ("{tilestored\t%%tmm"#src", (%0,%1,1)|tilestored\t[%0+%1*1], %%tmm"#src"}" \ - :: "r" ((void*) base), "r" ((long) stride) \ + :: "r" ((void*) (base)), "r" ((long) (stride)) \ : "memory") #define _tile_zero(dst) \