From patchwork Fri Aug 13 00:48:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongyu Wang X-Patchwork-Id: 1516490 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=gPTHShGf; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Gm4hK2RX8z9t6S for ; Fri, 13 Aug 2021 10:49:35 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 414923864845 for ; Fri, 13 Aug 2021 00:49:33 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 414923864845 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1628815773; bh=wFhDE6TIFc4/V+ShAar4BZh6dCg1in3kUwh9t79yzsY=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=gPTHShGf9ZhZl4HMP0Xnslw/ZPwwD8y2bub9YC9PQ4zBQp2+P3nNBlTM+sIa+0ky2 FRuvscA1eTFJd5uZGDKocOdFueslU4K2ym7ItY51vPJegg12RQFH4Wv3nPePECw6U6 YFGzlcidsrEHSdUT6weDUTTWfu0hdvkW+e2XM1vo= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by sourceware.org (Postfix) with ESMTPS id 9F5493864845 for ; Fri, 13 Aug 2021 00:48:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 9F5493864845 X-IronPort-AV: E=McAfee;i="6200,9189,10074"; a="215208421" X-IronPort-AV: E=Sophos;i="5.84,317,1620716400"; d="scan'208";a="215208421" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2021 17:48:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,317,1620716400"; d="scan'208";a="528134336" Received: from scymds01.sc.intel.com ([10.148.94.138]) by fmsmga002.fm.intel.com with ESMTP; 12 Aug 2021 17:48:38 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.236.50]) by scymds01.sc.intel.com with ESMTP id 17D0mafi026976; Thu, 12 Aug 2021 17:48:37 -0700 To: ubizjak@gmail.com Subject: [PATCH] i386: Add peephole for lea and zero extend [PR 101716] Date: Fri, 13 Aug 2021 08:48:36 +0800 Message-Id: <20210813004836.92981-1-hongyu.wang@intel.com> X-Mailer: git-send-email 2.18.1 X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM, GIT_PATCH_0, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_SOFTFAIL, SPOOFED_FREEMAIL, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Hongyu Wang via Gcc-patches From: Hongyu Wang Reply-To: Hongyu Wang Cc: gcc-patches@gcc.gnu.org Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi, For lea + zero_extendsidi insns, if dest of lea and src of zext are the same, combine them with single leal under 64bit target since 32bit register will be automatically zero-extended. Bootstrapped and regtested on x86_64-linux-gnu{-m32,}. Ok for master? gcc/ChangeLog: PR target/101716 * config/i386/i386.md (*lea_zext): New define_insn. (define_peephole2): New peephole2 to combine zero_extend with lea. gcc/testsuite/ChangeLog: PR target/101716 * gcc.target/i386/pr101716.c: New test. --- gcc/config/i386/i386.md | 20 ++++++++++++++++++++ gcc/testsuite/gcc.target/i386/pr101716.c | 11 +++++++++++ 2 files changed, 31 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr101716.c diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 4a8e8fea290..6739dbd799b 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -5187,6 +5187,26 @@ (const_string "SI") (const_string "")))]) +;; combine zero_extendsidi with lea to use leal. +(define_insn "*lea_zext" + [(set (match_operand:DI 0 "register_operand" "=r") + (zero_extend:DI + (match_operand:SWI48 1 "address_no_seg_operand" "Ts")))] + "TARGET_64BIT" + "lea{l}\t{%E1, %k0|%k0,%E1}") + +(define_peephole2 + [(set (match_operand:SWI48 0 "general_reg_operand") + (match_operand:SWI48 1 "address_no_seg_operand")) + (set (match_operand:DI 2 "general_reg_operand") + (zero_extend:DI (match_operand:SI 3 "general_reg_operand")))] + "TARGET_64BIT && ix86_hardreg_mov_ok (operands[2], operands[1]) + && REGNO (operands[0]) == REGNO (operands[3]) + && (REGNO (operands[2]) == REGNO (operands[3]) + || peep2_reg_dead_p (2, operands[3]))" + [(set (match_dup 2) + (zero_extend:DI (match_dup 1)))]) + (define_peephole2 [(set (match_operand:SWI48 0 "register_operand") (match_operand:SWI48 1 "address_no_seg_operand"))] diff --git a/gcc/testsuite/gcc.target/i386/pr101716.c b/gcc/testsuite/gcc.target/i386/pr101716.c new file mode 100644 index 00000000000..0b684755c2f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr101716.c @@ -0,0 +1,11 @@ +/* PR target/101716 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2" } */ + +/* { dg-final { scan-assembler "leal\[\\t \]\*eax" } } */ +/* { dg-final { scan-assembler-not "movl\[\\t \]\*eax" } } */ + +unsigned long long sample1(unsigned long long m) { + unsigned int t = -1; + return (m << 1) & t; +}