| Message ID | 20210804033348.147517-1-hongtao.liu@intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | [i386] Refine predicate of peephole2 to general_reg_operand. [PR target/101743] | expand |
On Wed, Aug 4, 2021 at 5:33 AM liuhongt <hongtao.liu@intel.com> wrote: > > Hi: > The define_peephole2 which is added by r12-2640-gf7bf03cf69ccb7dc > should only work on general registers, considering that x86 also > supports mov instructions between gpr, sse reg, mask reg, limiting the > peephole2 predicate to general_reg_operand. > I failed to contruct a testcase, but I believe that the PR problem > should be solved by this patch. > > Bootstrapped and regtested on x86_64-linux-gnu{-m32,}. > Ok for trunk? > > gcc/ChangeLog: > > PR target/101743 > * config/i386/i386.md (peephole2): Refine predicate from > register_operand to general_reg_operand. OK. Thanks, Uros. > --- > gcc/config/i386/i386.md | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md > index 0c23ddb8d1f..51e8b475bca 100644 > --- a/gcc/config/i386/i386.md > +++ b/gcc/config/i386/i386.md > @@ -19423,11 +19423,11 @@ (define_peephole2 > ;; Eliminate a reg-reg mov by inverting the condition of a cmov (#1). > ;; mov r0,r1; dec r0; mov r2,r3; cmov r0,r2 -> dec r1; mov r0,r3; cmov r0, r1 > (define_peephole2 > - [(set (match_operand:SWI248 0 "register_operand") > - (match_operand:SWI248 1 "register_operand")) > + [(set (match_operand:SWI248 0 "general_reg_operand") > + (match_operand:SWI248 1 "general_reg_operand")) > (parallel [(set (reg FLAGS_REG) (match_operand 5)) > (set (match_dup 0) (match_operand:SWI248 6))]) > - (set (match_operand:SWI248 2 "register_operand") > + (set (match_operand:SWI248 2 "general_reg_operand") > (match_operand:SWI248 3)) > (set (match_dup 0) > (if_then_else:SWI248 (match_operator 4 "ix86_comparison_operator" > @@ -19455,10 +19455,10 @@ (define_peephole2 > ;; Eliminate a reg-reg mov by inverting the condition of a cmov (#2). > ;; mov r2,r3; mov r0,r1; dec r0; cmov r0,r2 -> dec r1; mov r0,r3; cmov r0, r1 > (define_peephole2 > - [(set (match_operand:SWI248 2 "register_operand") > + [(set (match_operand:SWI248 2 "general_reg_operand") > (match_operand:SWI248 3)) > - (set (match_operand:SWI248 0 "register_operand") > - (match_operand:SWI248 1 "register_operand")) > + (set (match_operand:SWI248 0 "general_reg_operand") > + (match_operand:SWI248 1 "general_reg_operand")) > (parallel [(set (reg FLAGS_REG) (match_operand 5)) > (set (match_dup 0) (match_operand:SWI248 6))]) > (set (match_dup 0) > -- > 2.27.0 >
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 0c23ddb8d1f..51e8b475bca 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -19423,11 +19423,11 @@ (define_peephole2 ;; Eliminate a reg-reg mov by inverting the condition of a cmov (#1). ;; mov r0,r1; dec r0; mov r2,r3; cmov r0,r2 -> dec r1; mov r0,r3; cmov r0, r1 (define_peephole2 - [(set (match_operand:SWI248 0 "register_operand") - (match_operand:SWI248 1 "register_operand")) + [(set (match_operand:SWI248 0 "general_reg_operand") + (match_operand:SWI248 1 "general_reg_operand")) (parallel [(set (reg FLAGS_REG) (match_operand 5)) (set (match_dup 0) (match_operand:SWI248 6))]) - (set (match_operand:SWI248 2 "register_operand") + (set (match_operand:SWI248 2 "general_reg_operand") (match_operand:SWI248 3)) (set (match_dup 0) (if_then_else:SWI248 (match_operator 4 "ix86_comparison_operator" @@ -19455,10 +19455,10 @@ (define_peephole2 ;; Eliminate a reg-reg mov by inverting the condition of a cmov (#2). ;; mov r2,r3; mov r0,r1; dec r0; cmov r0,r2 -> dec r1; mov r0,r3; cmov r0, r1 (define_peephole2 - [(set (match_operand:SWI248 2 "register_operand") + [(set (match_operand:SWI248 2 "general_reg_operand") (match_operand:SWI248 3)) - (set (match_operand:SWI248 0 "register_operand") - (match_operand:SWI248 1 "register_operand")) + (set (match_operand:SWI248 0 "general_reg_operand") + (match_operand:SWI248 1 "general_reg_operand")) (parallel [(set (reg FLAGS_REG) (match_operand 5)) (set (match_dup 0) (match_operand:SWI248 6))]) (set (match_dup 0)
Hi: The define_peephole2 which is added by r12-2640-gf7bf03cf69ccb7dc should only work on general registers, considering that x86 also supports mov instructions between gpr, sse reg, mask reg, limiting the peephole2 predicate to general_reg_operand. I failed to contruct a testcase, but I believe that the PR problem should be solved by this patch. Bootstrapped and regtested on x86_64-linux-gnu{-m32,}. Ok for trunk? gcc/ChangeLog: PR target/101743 * config/i386/i386.md (peephole2): Refine predicate from register_operand to general_reg_operand. --- gcc/config/i386/i386.md | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)