diff mbox series

IBM Z: Add alternative to *movdi_{31, 64} in order to load a DFP zero

Message ID 20210412134029.789314-1-stefansf@linux.ibm.com
State New
Headers show
Series IBM Z: Add alternative to *movdi_{31, 64} in order to load a DFP zero | expand

Commit Message

Stefan Schulze Frielinghaus April 12, 2021, 1:40 p.m. UTC
Bootstraped and regtested on IBM Z.  Ok for mainline?

gcc/ChangeLog:

	* config/s390/s390.md ("*movdi_31", "*movdi_64"): Add
	  alternative in order to load a DFP zero.
---
 gcc/config/s390/s390.md | 25 ++++++++++++++-----------
 1 file changed, 14 insertions(+), 11 deletions(-)

Comments

Andreas Krebbel April 12, 2021, 1:53 p.m. UTC | #1
On 4/12/21 3:40 PM, Stefan Schulze Frielinghaus wrote:
> Bootstraped and regtested on IBM Z.  Ok for mainline?
> 
> gcc/ChangeLog:
> 
> 	* config/s390/s390.md ("*movdi_31", "*movdi_64"): Add
> 	  alternative in order to load a DFP zero.

Ok. Thanks!

Andreas

> ---
>  gcc/config/s390/s390.md | 25 ++++++++++++++-----------
>  1 file changed, 14 insertions(+), 11 deletions(-)
> 
> diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
> index c10f25b2472..7faf775fbf2 100644
> --- a/gcc/config/s390/s390.md
> +++ b/gcc/config/s390/s390.md
> @@ -1868,9 +1868,9 @@
>  
>  (define_insn "*movdi_64"
>    [(set (match_operand:DI 0 "nonimmediate_operand"
> -         "=d,    d,    d,    d,    d, d,    d,    d,f,d,d,d,d,d,T,!*f,!*f,!*f,!R,!T,b,Q,d,t,Q,t,v,v,v,d,v,R,d")
> +         "=d,    d,    d,    d,    d, d,    d,    d,f,d,!*f,d,d,d,d,T,!*f,!*f,!*f,!R,!T,b,Q,d,t,Q,t,v,v,v,d,v,R,d")
>          (match_operand:DI 1 "general_operand"
> -         " K,N0HD0,N1HD0,N2HD0,N3HD0,Os,N0SD0,N1SD0,d,f,L,b,d,T,d, *f,  R,  T,*f,*f,d,K,t,d,t,Q,K,v,d,v,R,v,ZL"))]
> +         " K,N0HD0,N1HD0,N2HD0,N3HD0,Os,N0SD0,N1SD0,d,f,j00,L,b,d,T,d, *f,  R,  T,*f,*f,d,K,t,d,t,Q,K,v,d,v,R,v,ZL"))]
>    "TARGET_ZARCH"
>    "@
>     lghi\t%0,%h1
> @@ -1883,6 +1883,7 @@
>     llilf\t%0,%k1
>     ldgr\t%0,%1
>     lgdr\t%0,%1
> +   lzdr\t%0
>     lay\t%0,%a1
>     lgrl\t%0,%1
>     lgr\t%0,%1
> @@ -1906,13 +1907,13 @@
>     vleg\t%v0,%1,0
>     vsteg\t%v1,%0,0
>     larl\t%0,%1"
> -  [(set_attr "op_type" "RI,RI,RI,RI,RI,RIL,RIL,RIL,RRE,RRE,RXY,RIL,RRE,RXY,
> +  [(set_attr "op_type" "RI,RI,RI,RI,RI,RIL,RIL,RIL,RRE,RRE,RRE,RXY,RIL,RRE,RXY,
>                          RXY,RR,RX,RXY,RX,RXY,RIL,SIL,*,*,RS,RS,VRI,VRR,VRS,VRS,
>                          VRX,VRX,RIL")
> -   (set_attr "type" "*,*,*,*,*,*,*,*,floaddf,floaddf,la,larl,lr,load,store,
> +   (set_attr "type" "*,*,*,*,*,*,*,*,floaddf,floaddf,fsimpdf,la,larl,lr,load,store,
>                       floaddf,floaddf,floaddf,fstoredf,fstoredf,larl,*,*,*,*,
>                       *,*,*,*,*,*,*,larl")
> -   (set_attr "cpu_facility" "*,*,*,*,*,extimm,extimm,extimm,dfp,dfp,longdisp,
> +   (set_attr "cpu_facility" "*,*,*,*,*,extimm,extimm,extimm,dfp,dfp,*,longdisp,
>                               z10,*,*,*,*,*,longdisp,*,longdisp,
>                               z10,z10,*,*,*,*,vx,vx,vx,vx,vx,vx,*")
>     (set_attr "z10prop" "z10_fwd_A1,
> @@ -1925,6 +1926,7 @@
>                          z10_fwd_E1,
>                          *,
>                          *,
> +			*,
>                          z10_fwd_A1,
>                          z10_fwd_A3,
>                          z10_fr_E1,
> @@ -1942,7 +1944,7 @@
>                          *,
>                          *,*,*,*,*,*,*,
>                          z10_super_A1")
> -   (set_attr "relative_long" "*,*,*,*,*,*,*,*,*,*,
> +   (set_attr "relative_long" "*,*,*,*,*,*,*,*,*,*,*,
>                                *,yes,*,*,*,*,*,*,*,*,
>                                yes,*,*,*,*,*,*,*,*,*,
>                                *,*,yes")
> @@ -2002,9 +2004,9 @@
>  
>  (define_insn "*movdi_31"
>    [(set (match_operand:DI 0 "nonimmediate_operand"
> -                            "=d,d,Q,S,d  ,o,!*f,!*f,!*f,!R,!T,d")
> +                            "=d,d,Q,S,d  ,o,!*f,!*f,!*f,!*f,!R,!T,d")
>          (match_operand:DI 1 "general_operand"
> -                            " Q,S,d,d,dPT,d, *f,  R,  T,*f,*f,b"))]
> +                            " Q,S,d,d,dPT,d, *f,  R,  T,j00,*f,*f,b"))]
>    "!TARGET_ZARCH"
>    "@
>     lm\t%0,%N0,%S1
> @@ -2016,12 +2018,13 @@
>     ldr\t%0,%1
>     ld\t%0,%1
>     ldy\t%0,%1
> +   lzdr\t%0
>     std\t%1,%0
>     stdy\t%1,%0
>     #"
> -  [(set_attr "op_type" "RS,RSY,RS,RSY,*,*,RR,RX,RXY,RX,RXY,*")
> -   (set_attr "type" "lm,lm,stm,stm,*,*,floaddf,floaddf,floaddf,fstoredf,fstoredf,*")
> -   (set_attr "cpu_facility" "*,longdisp,*,longdisp,*,*,*,*,longdisp,*,longdisp,z10")])
> +  [(set_attr "op_type" "RS,RSY,RS,RSY,*,*,RR,RX,RXY,RRE,RX,RXY,*")
> +   (set_attr "type" "lm,lm,stm,stm,*,*,floaddf,floaddf,floaddf,fsimpdf,fstoredf,fstoredf,*")
> +   (set_attr "cpu_facility" "*,longdisp,*,longdisp,*,*,*,*,longdisp,*,*,longdisp,z10")])
>  
>  ; For a load from a symbol ref we can use one of the target registers
>  ; together with larl to load the address.
>
Andreas Krebbel April 16, 2021, 6:22 p.m. UTC | #2
On 4/12/21 3:40 PM, Stefan Schulze Frielinghaus wrote:
> Bootstraped and regtested on IBM Z.  Ok for mainline?
> 
> gcc/ChangeLog:
> 
> 	* config/s390/s390.md ("*movdi_31", "*movdi_64"): Add
> 	  alternative in order to load a DFP zero.

Ok, thanks!

Andreas

> ---
>  gcc/config/s390/s390.md | 25 ++++++++++++++-----------
>  1 file changed, 14 insertions(+), 11 deletions(-)
> 
> diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
> index c10f25b2472..7faf775fbf2 100644
> --- a/gcc/config/s390/s390.md
> +++ b/gcc/config/s390/s390.md
> @@ -1868,9 +1868,9 @@
>  
>  (define_insn "*movdi_64"
>    [(set (match_operand:DI 0 "nonimmediate_operand"
> -         "=d,    d,    d,    d,    d, d,    d,    d,f,d,d,d,d,d,T,!*f,!*f,!*f,!R,!T,b,Q,d,t,Q,t,v,v,v,d,v,R,d")
> +         "=d,    d,    d,    d,    d, d,    d,    d,f,d,!*f,d,d,d,d,T,!*f,!*f,!*f,!R,!T,b,Q,d,t,Q,t,v,v,v,d,v,R,d")
>          (match_operand:DI 1 "general_operand"
> -         " K,N0HD0,N1HD0,N2HD0,N3HD0,Os,N0SD0,N1SD0,d,f,L,b,d,T,d, *f,  R,  T,*f,*f,d,K,t,d,t,Q,K,v,d,v,R,v,ZL"))]
> +         " K,N0HD0,N1HD0,N2HD0,N3HD0,Os,N0SD0,N1SD0,d,f,j00,L,b,d,T,d, *f,  R,  T,*f,*f,d,K,t,d,t,Q,K,v,d,v,R,v,ZL"))]
>    "TARGET_ZARCH"
>    "@
>     lghi\t%0,%h1
> @@ -1883,6 +1883,7 @@
>     llilf\t%0,%k1
>     ldgr\t%0,%1
>     lgdr\t%0,%1
> +   lzdr\t%0
>     lay\t%0,%a1
>     lgrl\t%0,%1
>     lgr\t%0,%1
> @@ -1906,13 +1907,13 @@
>     vleg\t%v0,%1,0
>     vsteg\t%v1,%0,0
>     larl\t%0,%1"
> -  [(set_attr "op_type" "RI,RI,RI,RI,RI,RIL,RIL,RIL,RRE,RRE,RXY,RIL,RRE,RXY,
> +  [(set_attr "op_type" "RI,RI,RI,RI,RI,RIL,RIL,RIL,RRE,RRE,RRE,RXY,RIL,RRE,RXY,
>                          RXY,RR,RX,RXY,RX,RXY,RIL,SIL,*,*,RS,RS,VRI,VRR,VRS,VRS,
>                          VRX,VRX,RIL")
> -   (set_attr "type" "*,*,*,*,*,*,*,*,floaddf,floaddf,la,larl,lr,load,store,
> +   (set_attr "type" "*,*,*,*,*,*,*,*,floaddf,floaddf,fsimpdf,la,larl,lr,load,store,
>                       floaddf,floaddf,floaddf,fstoredf,fstoredf,larl,*,*,*,*,
>                       *,*,*,*,*,*,*,larl")
> -   (set_attr "cpu_facility" "*,*,*,*,*,extimm,extimm,extimm,dfp,dfp,longdisp,
> +   (set_attr "cpu_facility" "*,*,*,*,*,extimm,extimm,extimm,dfp,dfp,*,longdisp,
>                               z10,*,*,*,*,*,longdisp,*,longdisp,
>                               z10,z10,*,*,*,*,vx,vx,vx,vx,vx,vx,*")
>     (set_attr "z10prop" "z10_fwd_A1,
> @@ -1925,6 +1926,7 @@
>                          z10_fwd_E1,
>                          *,
>                          *,
> +			*,
>                          z10_fwd_A1,
>                          z10_fwd_A3,
>                          z10_fr_E1,
> @@ -1942,7 +1944,7 @@
>                          *,
>                          *,*,*,*,*,*,*,
>                          z10_super_A1")
> -   (set_attr "relative_long" "*,*,*,*,*,*,*,*,*,*,
> +   (set_attr "relative_long" "*,*,*,*,*,*,*,*,*,*,*,
>                                *,yes,*,*,*,*,*,*,*,*,
>                                yes,*,*,*,*,*,*,*,*,*,
>                                *,*,yes")
> @@ -2002,9 +2004,9 @@
>  
>  (define_insn "*movdi_31"
>    [(set (match_operand:DI 0 "nonimmediate_operand"
> -                            "=d,d,Q,S,d  ,o,!*f,!*f,!*f,!R,!T,d")
> +                            "=d,d,Q,S,d  ,o,!*f,!*f,!*f,!*f,!R,!T,d")
>          (match_operand:DI 1 "general_operand"
> -                            " Q,S,d,d,dPT,d, *f,  R,  T,*f,*f,b"))]
> +                            " Q,S,d,d,dPT,d, *f,  R,  T,j00,*f,*f,b"))]
>    "!TARGET_ZARCH"
>    "@
>     lm\t%0,%N0,%S1
> @@ -2016,12 +2018,13 @@
>     ldr\t%0,%1
>     ld\t%0,%1
>     ldy\t%0,%1
> +   lzdr\t%0
>     std\t%1,%0
>     stdy\t%1,%0
>     #"
> -  [(set_attr "op_type" "RS,RSY,RS,RSY,*,*,RR,RX,RXY,RX,RXY,*")
> -   (set_attr "type" "lm,lm,stm,stm,*,*,floaddf,floaddf,floaddf,fstoredf,fstoredf,*")
> -   (set_attr "cpu_facility" "*,longdisp,*,longdisp,*,*,*,*,longdisp,*,longdisp,z10")])
> +  [(set_attr "op_type" "RS,RSY,RS,RSY,*,*,RR,RX,RXY,RRE,RX,RXY,*")
> +   (set_attr "type" "lm,lm,stm,stm,*,*,floaddf,floaddf,floaddf,fsimpdf,fstoredf,fstoredf,*")
> +   (set_attr "cpu_facility" "*,longdisp,*,longdisp,*,*,*,*,longdisp,*,*,longdisp,z10")])
>  
>  ; For a load from a symbol ref we can use one of the target registers
>  ; together with larl to load the address.
>
diff mbox series

Patch

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index c10f25b2472..7faf775fbf2 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -1868,9 +1868,9 @@ 
 
 (define_insn "*movdi_64"
   [(set (match_operand:DI 0 "nonimmediate_operand"
-         "=d,    d,    d,    d,    d, d,    d,    d,f,d,d,d,d,d,T,!*f,!*f,!*f,!R,!T,b,Q,d,t,Q,t,v,v,v,d,v,R,d")
+         "=d,    d,    d,    d,    d, d,    d,    d,f,d,!*f,d,d,d,d,T,!*f,!*f,!*f,!R,!T,b,Q,d,t,Q,t,v,v,v,d,v,R,d")
         (match_operand:DI 1 "general_operand"
-         " K,N0HD0,N1HD0,N2HD0,N3HD0,Os,N0SD0,N1SD0,d,f,L,b,d,T,d, *f,  R,  T,*f,*f,d,K,t,d,t,Q,K,v,d,v,R,v,ZL"))]
+         " K,N0HD0,N1HD0,N2HD0,N3HD0,Os,N0SD0,N1SD0,d,f,j00,L,b,d,T,d, *f,  R,  T,*f,*f,d,K,t,d,t,Q,K,v,d,v,R,v,ZL"))]
   "TARGET_ZARCH"
   "@
    lghi\t%0,%h1
@@ -1883,6 +1883,7 @@ 
    llilf\t%0,%k1
    ldgr\t%0,%1
    lgdr\t%0,%1
+   lzdr\t%0
    lay\t%0,%a1
    lgrl\t%0,%1
    lgr\t%0,%1
@@ -1906,13 +1907,13 @@ 
    vleg\t%v0,%1,0
    vsteg\t%v1,%0,0
    larl\t%0,%1"
-  [(set_attr "op_type" "RI,RI,RI,RI,RI,RIL,RIL,RIL,RRE,RRE,RXY,RIL,RRE,RXY,
+  [(set_attr "op_type" "RI,RI,RI,RI,RI,RIL,RIL,RIL,RRE,RRE,RRE,RXY,RIL,RRE,RXY,
                         RXY,RR,RX,RXY,RX,RXY,RIL,SIL,*,*,RS,RS,VRI,VRR,VRS,VRS,
                         VRX,VRX,RIL")
-   (set_attr "type" "*,*,*,*,*,*,*,*,floaddf,floaddf,la,larl,lr,load,store,
+   (set_attr "type" "*,*,*,*,*,*,*,*,floaddf,floaddf,fsimpdf,la,larl,lr,load,store,
                      floaddf,floaddf,floaddf,fstoredf,fstoredf,larl,*,*,*,*,
                      *,*,*,*,*,*,*,larl")
-   (set_attr "cpu_facility" "*,*,*,*,*,extimm,extimm,extimm,dfp,dfp,longdisp,
+   (set_attr "cpu_facility" "*,*,*,*,*,extimm,extimm,extimm,dfp,dfp,*,longdisp,
                              z10,*,*,*,*,*,longdisp,*,longdisp,
                              z10,z10,*,*,*,*,vx,vx,vx,vx,vx,vx,*")
    (set_attr "z10prop" "z10_fwd_A1,
@@ -1925,6 +1926,7 @@ 
                         z10_fwd_E1,
                         *,
                         *,
+			*,
                         z10_fwd_A1,
                         z10_fwd_A3,
                         z10_fr_E1,
@@ -1942,7 +1944,7 @@ 
                         *,
                         *,*,*,*,*,*,*,
                         z10_super_A1")
-   (set_attr "relative_long" "*,*,*,*,*,*,*,*,*,*,
+   (set_attr "relative_long" "*,*,*,*,*,*,*,*,*,*,*,
                               *,yes,*,*,*,*,*,*,*,*,
                               yes,*,*,*,*,*,*,*,*,*,
                               *,*,yes")
@@ -2002,9 +2004,9 @@ 
 
 (define_insn "*movdi_31"
   [(set (match_operand:DI 0 "nonimmediate_operand"
-                            "=d,d,Q,S,d  ,o,!*f,!*f,!*f,!R,!T,d")
+                            "=d,d,Q,S,d  ,o,!*f,!*f,!*f,!*f,!R,!T,d")
         (match_operand:DI 1 "general_operand"
-                            " Q,S,d,d,dPT,d, *f,  R,  T,*f,*f,b"))]
+                            " Q,S,d,d,dPT,d, *f,  R,  T,j00,*f,*f,b"))]
   "!TARGET_ZARCH"
   "@
    lm\t%0,%N0,%S1
@@ -2016,12 +2018,13 @@ 
    ldr\t%0,%1
    ld\t%0,%1
    ldy\t%0,%1
+   lzdr\t%0
    std\t%1,%0
    stdy\t%1,%0
    #"
-  [(set_attr "op_type" "RS,RSY,RS,RSY,*,*,RR,RX,RXY,RX,RXY,*")
-   (set_attr "type" "lm,lm,stm,stm,*,*,floaddf,floaddf,floaddf,fstoredf,fstoredf,*")
-   (set_attr "cpu_facility" "*,longdisp,*,longdisp,*,*,*,*,longdisp,*,longdisp,z10")])
+  [(set_attr "op_type" "RS,RSY,RS,RSY,*,*,RR,RX,RXY,RRE,RX,RXY,*")
+   (set_attr "type" "lm,lm,stm,stm,*,*,floaddf,floaddf,floaddf,fsimpdf,fstoredf,fstoredf,*")
+   (set_attr "cpu_facility" "*,longdisp,*,longdisp,*,*,*,*,longdisp,*,*,longdisp,z10")])
 
 ; For a load from a symbol ref we can use one of the target registers
 ; together with larl to load the address.