From patchwork Mon Apr 5 19:43:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Iain Buclaw X-Patchwork-Id: 1462528 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=T80QsdW+; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FDh1P2MP1z9sSC for ; Tue, 6 Apr 2021 05:44:09 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9090A384B824; Mon, 5 Apr 2021 19:44:05 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9090A384B824 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1617651845; bh=txiKRyu476ToAZyNnxJEQ4JrJ1E9IFRcHvcV2f3VCSk=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=T80QsdW+sN8theN/4gM5AUHI87zRdF9pG9P7/jupuumnhFhxxbvdl+Nt3ktDsIdnK OGglikG0Hg+NgPW1JIlDVrOavVqqU+sZxIiM9xWe52hR09v0Gw+Cp4usDPMesE7uba 1ZKtIKChzGXCNll2cinq0rnazlhlm0mEOIzVIi9o= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mout-p-202.mailbox.org (mout-p-202.mailbox.org [IPv6:2001:67c:2050::465:202]) by sourceware.org (Postfix) with ESMTPS id EEA513846401 for ; Mon, 5 Apr 2021 19:44:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org EEA513846401 Received: from smtp2.mailbox.org (smtp2.mailbox.org [80.241.60.241]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-202.mailbox.org (Postfix) with ESMTPS id 4FDh1C3GjmzQjnM; Mon, 5 Apr 2021 21:43:59 +0200 (CEST) X-Virus-Scanned: amavisd-new at heinlein-support.de Received: from smtp2.mailbox.org ([80.241.60.241]) by hefe.heinlein-support.de (hefe.heinlein-support.de [91.198.250.172]) (amavisd-new, port 10030) with ESMTP id 8H8XPoGoUzmN; Mon, 5 Apr 2021 21:43:55 +0200 (CEST) To: gcc-patches@gcc.gnu.org Subject: [PATCH 2/3] d: Add TARGET_D_REGISTER_CPU_TARGET_INFO Date: Mon, 5 Apr 2021 21:43:53 +0200 Message-Id: <20210405194353.922997-1-ibuclaw@gdcproject.org> MIME-Version: 1.0 X-MBO-SPAM-Probability: * X-Rspamd-Score: 1.33 / 15.00 / 15.00 X-Rspamd-Queue-Id: 6834817BE X-Rspamd-UID: 57e295 X-Spam-Status: No, score=-13.6 required=5.0 tests=BAYES_00, DKIM_INVALID, DKIM_SIGNED, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Iain Buclaw via Gcc-patches From: Iain Buclaw Reply-To: Iain Buclaw Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch adds TARGET_D_REGISTER_CPU_TARGET_INFO as a new D front-end target hook, implementing `__traits(getTargetInfo, "floatAbi")' for all targets that have D support files. This trait was added earlier in the front-end as a stub, however the target-specific implementation was left out until now. Bootstrapped and regression tested on x86_64-linux-gnu/-m32/-mx32, and tested on x86_64-darwin for getting the libphobos port set-up. Any issues with this, or OK to commit? Regards Iain. --- gcc/ChangeLog: * config/aarch64/aarch64-d.c (aarch64_d_handle_target_float_abi): New function. (aarch64_d_register_target_info): New function. * config/aarch64/aarch64-protos.h (aarch64_d_register_target_info): Declare. * config/aarch64/aarch64.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. * config/arm/arm-d.c (arm_d_handle_target_float_abi): New function. (arm_d_register_target_info): New function. * config/arm/arm-protos.h (arm_d_register_target_info): Declare. * config/arm/arm.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. * config/i386/i386-d.c (ix86_d_handle_target_float_abi): New function. (ix86_d_register_target_info): New function. * config/i386/i386-protos.h (ix86_d_register_target_info): Declare. * config/i386/i386.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. * config/mips/mips-d.c (mips_d_handle_target_float_abi): New function. (mips_d_register_target_info): New function. * config/mips/mips-protos.h (mips_d_register_target_info): Declare. * config/mips/mips.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. * config/pa/pa-d.c (pa_d_handle_target_float_abi): New function. (pa_d_register_target_info): New function. * config/pa/pa-protos.h (pa_d_register_target_info): Declare. * config/pa/pa.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. * config/riscv/riscv-d.c (riscv_d_handle_target_float_abi): New function. (riscv_d_register_target_info): New function. * config/riscv/riscv-protos.h (riscv_d_register_target_info): Declare. * config/riscv/riscv.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. * config/rs6000/rs6000-d.c (rs6000_d_handle_target_float_abi): New function. (rs6000_d_register_target_info): New function. * config/rs6000/rs6000-protos.h (rs6000_d_register_target_info): Declare. * config/rs6000/rs6000.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. * config/s390/s390-d.c (s390_d_handle_target_float_abi): New function. (s390_d_register_target_info): New function. * config/s390/s390-protos.h (s390_d_register_target_info): Declare. * config/s390/s390.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. * config/sparc/sparc-d.c (sparc_d_handle_target_float_abi): New function. (sparc_d_register_target_info): New function. * config/sparc/sparc-protos.h (sparc_d_register_target_info): Declare. * config/sparc/sparc.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. * doc/tm.texi: Regenerate. * doc/tm.texi.in (D language and ABI): Add @hook for TARGET_D_REGISTER_CPU_TARGET_INFO. gcc/d/ChangeLog: * d-target.cc (Target::_init): Call new targetdm hook to register CPU specific target info keys. * d-target.def (d_register_cpu_target_info): New hook. --- gcc/config/aarch64/aarch64-d.c | 23 ++++++++++++++ gcc/config/aarch64/aarch64-protos.h | 1 + gcc/config/aarch64/aarch64.h | 3 +- gcc/config/arm/arm-d.c | 42 ++++++++++++++++++++++++++ gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm.h | 3 +- gcc/config/i386/i386-d.c | 28 +++++++++++++++++ gcc/config/i386/i386-protos.h | 1 + gcc/config/i386/i386.h | 1 + gcc/config/mips/mips-d.c | 30 ++++++++++++++++++ gcc/config/mips/mips-protos.h | 1 + gcc/config/mips/mips.h | 3 +- gcc/config/pa/pa-d.c | 28 +++++++++++++++++ gcc/config/pa/pa-protos.h | 1 + gcc/config/pa/pa.h | 3 +- gcc/config/riscv/riscv-d.c | 47 +++++++++++++++++++++++++++++ gcc/config/riscv/riscv-protos.h | 1 + gcc/config/riscv/riscv.h | 3 +- gcc/config/rs6000/rs6000-d.c | 30 ++++++++++++++++++ gcc/config/rs6000/rs6000-protos.h | 1 + gcc/config/rs6000/rs6000.h | 3 +- gcc/config/s390/s390-d.c | 30 ++++++++++++++++++ gcc/config/s390/s390-protos.h | 1 + gcc/config/s390/s390.h | 3 +- gcc/config/sparc/sparc-d.c | 28 +++++++++++++++++ gcc/config/sparc/sparc-protos.h | 1 + gcc/config/sparc/sparc.h | 3 +- gcc/d/d-target.cc | 1 + gcc/d/d-target.def | 12 ++++++++ gcc/doc/tm.texi | 9 ++++++ gcc/doc/tm.texi.in | 2 ++ 31 files changed, 336 insertions(+), 8 deletions(-) diff --git a/gcc/config/aarch64/aarch64-d.c b/gcc/config/aarch64/aarch64-d.c index 4fce593ac27..416bb7c8033 100644 --- a/gcc/config/aarch64/aarch64-d.c +++ b/gcc/config/aarch64/aarch64-d.c @@ -31,3 +31,26 @@ aarch64_d_target_versions (void) d_add_builtin_version ("AArch64"); d_add_builtin_version ("D_HardFloat"); } + +/* Handle a call to `__traits(getTargetInfo, "floatAbi")'. */ + +static tree +aarch64_d_handle_target_float_abi (void) +{ + const char *abi = "hard"; + + return build_string_literal (strlen (abi) + 1, abi); +} + +/* Implement TARGET_D_REGISTER_CPU_TARGET_INFO. */ + +void +aarch64_d_register_target_info (void) +{ + const struct d_target_info_spec handlers[] = { + { "floatAbi", aarch64_d_handle_target_float_abi }, + { NULL, NULL }, + }; + + d_add_target_info_handlers (handlers); +} diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h index d5d5417370e..c2033387384 100644 --- a/gcc/config/aarch64/aarch64-protos.h +++ b/gcc/config/aarch64/aarch64-protos.h @@ -1011,6 +1011,7 @@ std::string aarch64_get_extension_string_for_isa_flags (uint64_t, uint64_t); /* Defined in aarch64-d.c */ extern void aarch64_d_target_versions (void); +extern void aarch64_d_register_target_info (void); rtl_opt_pass *make_pass_fma_steering (gcc::context *); rtl_opt_pass *make_pass_track_speculation (gcc::context *); diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index d0bae617674..bfffbcd6abf 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -26,8 +26,9 @@ #define TARGET_CPU_CPP_BUILTINS() \ aarch64_cpu_cpp_builtins (pfile) -/* Target CPU versions for D. */ +/* Target hooks for D language. */ #define TARGET_D_CPU_VERSIONS aarch64_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO aarch64_d_register_target_info diff --git a/gcc/config/arm/arm-d.c b/gcc/config/arm/arm-d.c index 2cb9f4bd899..5f43ef9b179 100644 --- a/gcc/config/arm/arm-d.c +++ b/gcc/config/arm/arm-d.c @@ -53,3 +53,45 @@ arm_d_target_versions (void) else if (TARGET_HARD_FLOAT) d_add_builtin_version ("D_HardFloat"); } + +/* Handle a call to `__traits(getTargetInfo, "floatAbi")'. */ + +static tree +arm_d_handle_target_float_abi (void) +{ + const char *abi; + + switch (arm_float_abi) + { + case ARM_FLOAT_ABI_HARD: + abi = "hard"; + break; + + case ARM_FLOAT_ABI_SOFT: + abi = "soft"; + break; + + case ARM_FLOAT_ABI_SOFTFP: + abi = "softfp"; + break; + + default: + abi = ""; + break; + } + + return build_string_literal (strlen (abi) + 1, abi); +} + +/* Implement TARGET_D_REGISTER_CPU_TARGET_INFO. */ + +void +arm_d_register_target_info (void) +{ + const struct d_target_info_spec handlers[] = { + { "floatAbi", arm_d_handle_target_float_abi }, + { NULL, NULL }, + }; + + d_add_target_info_handlers (handlers); +} diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index 952a8256a19..25215417751 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -397,6 +397,7 @@ extern void arm_cpu_cpp_builtins (struct cpp_reader *); /* Defined in arm-d.c */ extern void arm_d_target_versions (void); +extern void arm_d_register_target_info (void); extern bool arm_is_constant_pool_ref (rtx); diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 113c015c455..c70af57b5f6 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -47,8 +47,9 @@ extern char arm_arch_name[]; /* Target CPU builtins. */ #define TARGET_CPU_CPP_BUILTINS() arm_cpu_cpp_builtins (pfile) -/* Target CPU versions for D. */ +/* Target hooks for D language. */ #define TARGET_D_CPU_VERSIONS arm_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO arm_d_register_target_info #include "config/arm/arm-opts.h" diff --git a/gcc/config/i386/i386-d.c b/gcc/config/i386/i386-d.c index 58b4790fdad..da5958c3e7d 100644 --- a/gcc/config/i386/i386-d.c +++ b/gcc/config/i386/i386-d.c @@ -45,6 +45,34 @@ ix86_d_target_versions (void) d_add_builtin_version ("D_SoftFloat"); } +/* Handle a call to `__traits(getTargetInfo, "floatAbi")'. */ + +static tree +ix86_d_handle_target_float_abi (void) +{ + const char *abi; + + if (! (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387)) + abi = "soft"; + else + abi = "hard"; + + return build_string_literal (strlen (abi) + 1, abi); +} + +/* Implement TARGET_D_REGISTER_CPU_TARGET_INFO. */ + +void +ix86_d_register_target_info (void) +{ + const struct d_target_info_spec handlers[] = { + { "floatAbi", ix86_d_handle_target_float_abi }, + { NULL, NULL }, + }; + + d_add_target_info_handlers (handlers); +} + /* Implement TARGET_D_HAS_STDCALL_CONVENTION for x86 targets. */ bool diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h index acfb9f5fe87..7782cf1163f 100644 --- a/gcc/config/i386/i386-protos.h +++ b/gcc/config/i386/i386-protos.h @@ -264,6 +264,7 @@ extern void ix86_register_pragmas (void); /* In i386-d.c */ extern void ix86_d_target_versions (void); +extern void ix86_d_register_target_info (void); extern bool ix86_d_has_stdcall_convention (unsigned int *, unsigned int *); /* In winnt.c */ diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 17e233a4e74..13174e7aa70 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -803,6 +803,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); /* Target hooks for D language. */ #define TARGET_D_CPU_VERSIONS ix86_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO ix86_d_register_target_info #define TARGET_D_HAS_STDCALL_CONVENTION ix86_d_has_stdcall_convention #ifndef CC1_SPEC diff --git a/gcc/config/mips/mips-d.c b/gcc/config/mips/mips-d.c index dc57127791c..e03f48602ef 100644 --- a/gcc/config/mips/mips-d.c +++ b/gcc/config/mips/mips-d.c @@ -56,3 +56,33 @@ mips_d_target_versions (void) d_add_builtin_version ("D_SoftFloat"); } } + +/* Handle a call to `__traits(getTargetInfo, "floatAbi")'. */ + +static tree +mips_d_handle_target_float_abi (void) +{ + const char *abi; + + if (TARGET_HARD_FLOAT_ABI) + abi = "hard"; + else if (TARGET_SOFT_FLOAT_ABI) + abi = "soft"; + else + abi = ""; + + return build_string_literal (strlen (abi) + 1, abi); +} + +/* Implement TARGET_D_REGISTER_CPU_TARGET_INFO. */ + +void +mips_d_register_target_info (void) +{ + const struct d_target_info_spec handlers[] = { + { "floatAbi", mips_d_handle_target_float_abi }, + { NULL, NULL }, + }; + + d_add_target_info_handlers (handlers); +} diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h index 72bbbe2d5e4..2cf4ed50292 100644 --- a/gcc/config/mips/mips-protos.h +++ b/gcc/config/mips/mips-protos.h @@ -388,5 +388,6 @@ extern void mips_expand_vec_cond_expr (machine_mode, machine_mode, rtx *); /* Routines implemented in mips-d.c */ extern void mips_d_target_versions (void); +extern void mips_d_register_target_info (void); #endif /* ! GCC_MIPS_PROTOS_H */ diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index b4a60a55d80..47aac9d3d61 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -658,8 +658,9 @@ struct mips_cpu_info { } \ while (0) -/* Target CPU versions for D. */ +/* Target hooks for D language. */ #define TARGET_D_CPU_VERSIONS mips_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO mips_d_register_target_info /* Default target_flags if no switches are specified */ diff --git a/gcc/config/pa/pa-d.c b/gcc/config/pa/pa-d.c index 663e749995a..41b2f1848e7 100644 --- a/gcc/config/pa/pa-d.c +++ b/gcc/config/pa/pa-d.c @@ -39,3 +39,31 @@ pa_d_target_versions (void) else d_add_builtin_version ("D_HardFloat"); } + +/* Handle a call to `__traits(getTargetInfo, "floatAbi")'. */ + +static tree +pa_d_handle_target_float_abi (void) +{ + const char *abi; + + if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT) + abi = "soft"; + else + abi = "hard"; + + return build_string_literal (strlen (abi) + 1, abi); +} + +/* Implement TARGET_D_REGISTER_CPU_TARGET_INFO. */ + +void +pa_d_register_target_info (void) +{ + const struct d_target_info_spec handlers[] = { + { "floatAbi", pa_d_handle_target_float_abi }, + { NULL, NULL }, + }; + + d_add_target_info_handlers (handlers); +} diff --git a/gcc/config/pa/pa-protos.h b/gcc/config/pa/pa-protos.h index 0e1e471da5f..5bf6fef4968 100644 --- a/gcc/config/pa/pa-protos.h +++ b/gcc/config/pa/pa-protos.h @@ -115,3 +115,4 @@ extern const int pa_magic_milli[]; /* Routines implemented in pa-d.c */ extern void pa_d_target_versions (void); +extern void pa_d_register_target_info (void); diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index 3ec015a8480..fbb96045a51 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -1302,8 +1302,9 @@ do { \ #define NEED_INDICATE_EXEC_STACK 0 -/* Target CPU versions for D. */ +/* Target hooks for D language. */ #define TARGET_D_CPU_VERSIONS pa_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO pa_d_register_target_info /* Output default function prologue for hpux. */ #define TARGET_ASM_FUNCTION_PROLOGUE pa_output_function_prologue diff --git a/gcc/config/riscv/riscv-d.c b/gcc/config/riscv/riscv-d.c index b20b778bd35..cf7729d9e4d 100644 --- a/gcc/config/riscv/riscv-d.c +++ b/gcc/config/riscv/riscv-d.c @@ -39,3 +39,50 @@ riscv_d_target_versions (void) else d_add_builtin_version ("D_SoftFloat"); } + + +/* Handle a call to `__traits(getTargetInfo, "floatAbi")'. */ + +static tree +riscv_d_handle_target_float_abi (void) +{ + const char *abi; + + switch (riscv_abi) + { + case ABI_ILP32E: + case ABI_ILP32: + case ABI_LP64: + abi = "soft"; + break; + + case ABI_ILP32F: + case ABI_LP64F: + abi = "single"; + break; + + case ABI_ILP32D: + case ABI_LP64D: + abi = "double"; + break; + + default: + abi = ""; + break; + } + + return build_string_literal (strlen (abi) + 1, abi); +} + +/* Implement TARGET_D_REGISTER_CPU_TARGET_INFO. */ + +void +riscv_d_register_target_info (void) +{ + const struct d_target_info_spec handlers[] = { + { "floatAbi", riscv_d_handle_target_float_abi }, + { NULL, NULL }, + }; + + d_add_target_info_handlers (handlers); +} diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h index cc0be7e7270..43d7224d694 100644 --- a/gcc/config/riscv/riscv-protos.h +++ b/gcc/config/riscv/riscv-protos.h @@ -80,6 +80,7 @@ void riscv_cpu_cpp_builtins (cpp_reader *); /* Routines implemented in riscv-d.c */ extern void riscv_d_target_versions (void); +extern void riscv_d_register_target_info (void); /* Routines implemented in riscv-builtins.c. */ extern void riscv_atomic_assign_expand_fenv (tree *, tree *, tree *); diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h index 3cc3e864a3e..d17096e1dfa 100644 --- a/gcc/config/riscv/riscv.h +++ b/gcc/config/riscv/riscv.h @@ -27,8 +27,9 @@ along with GCC; see the file COPYING3. If not see /* Target CPU builtins. */ #define TARGET_CPU_CPP_BUILTINS() riscv_cpu_cpp_builtins (pfile) -/* Target CPU versions for D. */ +/* Target hooks for D language. */ #define TARGET_D_CPU_VERSIONS riscv_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO riscv_d_register_target_info #ifdef TARGET_BIG_ENDIAN_DEFAULT #define DEFAULT_ENDIAN_SPEC "b" diff --git a/gcc/config/rs6000/rs6000-d.c b/gcc/config/rs6000/rs6000-d.c index 6bfe8130dd3..755de42733b 100644 --- a/gcc/config/rs6000/rs6000-d.c +++ b/gcc/config/rs6000/rs6000-d.c @@ -45,3 +45,33 @@ rs6000_d_target_versions (void) d_add_builtin_version ("D_SoftFloat"); } } + +/* Handle a call to `__traits(getTargetInfo, "floatAbi")'. */ + +static tree +rs6000_d_handle_target_float_abi (void) +{ + const char *abi; + + if (TARGET_HARD_FLOAT) + abi = "hard"; + else if (TARGET_SOFT_FLOAT) + abi = "soft"; + else + abi = ""; + + return build_string_literal (strlen (abi) + 1, abi); +} + +/* Implement TARGET_D_REGISTER_CPU_TARGET_INFO. */ + +void +rs6000_d_register_target_info (void) +{ + const struct d_target_info_spec handlers[] = { + { "floatAbi", rs6000_d_handle_target_float_abi }, + { NULL, NULL }, + }; + + d_add_target_info_handlers (handlers); +} diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index c44fd3d0263..a06a147c339 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -298,6 +298,7 @@ extern void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT, /* Declare functions in rs6000-d.c */ extern void rs6000_d_target_versions (void); +extern void rs6000_d_register_target_info (void); #ifdef NO_DOLLAR_IN_LABEL const char * rs6000_xcoff_strip_dollar (const char *); diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 233a92baf3c..164d359b724 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -641,8 +641,9 @@ extern unsigned char rs6000_recip_bits[]; #define TARGET_CPU_CPP_BUILTINS() \ rs6000_cpu_cpp_builtins (pfile) -/* Target CPU versions for D. */ +/* Target hooks for D language. */ #define TARGET_D_CPU_VERSIONS rs6000_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO rs6000_d_register_target_info /* This is used by rs6000_cpu_cpp_builtins to indicate the byte order we're compiling for. Some configurations may need to override it. */ diff --git a/gcc/config/s390/s390-d.c b/gcc/config/s390/s390-d.c index 2f945ebfa12..1a990636aa1 100644 --- a/gcc/config/s390/s390-d.c +++ b/gcc/config/s390/s390-d.c @@ -41,3 +41,33 @@ s390_d_target_versions (void) else if (TARGET_HARD_FLOAT) d_add_builtin_version ("D_HardFloat"); } + +/* Handle a call to `__traits(getTargetInfo, "floatAbi")'. */ + +static tree +s390_d_handle_target_float_abi (void) +{ + const char *abi; + + if (TARGET_HARD_FLOAT) + abi = "hard"; + else if (TARGET_SOFT_FLOAT) + abi = "soft"; + else + abi = ""; + + return build_string_literal (strlen (abi) + 1, abi); +} + +/* Implement TARGET_D_REGISTER_CPU_TARGET_INFO. */ + +void +s390_d_register_target_info (void) +{ + const struct d_target_info_spec handlers[] = { + { "floatAbi", s390_d_handle_target_float_abi }, + { NULL, NULL }, + }; + + d_add_target_info_handlers (handlers); +} diff --git a/gcc/config/s390/s390-protos.h b/gcc/config/s390/s390-protos.h index acbdf66483a..289e018cf0f 100644 --- a/gcc/config/s390/s390-protos.h +++ b/gcc/config/s390/s390-protos.h @@ -173,6 +173,7 @@ extern bool s390_const_operand_ok (tree, int, int, tree); /* s390-d.c routines */ extern void s390_d_target_versions (void); +extern void s390_d_register_target_info (void); /* Pass management. */ namespace gcc { class context; } diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h index 991af969c87..3b876160420 100644 --- a/gcc/config/s390/s390.h +++ b/gcc/config/s390/s390.h @@ -247,8 +247,9 @@ enum processor_flags /* Target CPU builtins. */ #define TARGET_CPU_CPP_BUILTINS() s390_cpu_cpp_builtins (pfile) -/* Target CPU versions for D. */ +/* Target hooks for D language. */ #define TARGET_D_CPU_VERSIONS s390_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO s390_d_register_target_info #ifdef DEFAULT_TARGET_64BIT #define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP \ diff --git a/gcc/config/sparc/sparc-d.c b/gcc/config/sparc/sparc-d.c index 0eb663bb132..cfb8daee25e 100644 --- a/gcc/config/sparc/sparc-d.c +++ b/gcc/config/sparc/sparc-d.c @@ -48,3 +48,31 @@ sparc_d_target_versions (void) d_add_builtin_version ("SPARC_SoftFloat"); } } + +/* Handle a call to `__traits(getTargetInfo, "floatAbi")'. */ + +static tree +sparc_d_handle_target_float_abi (void) +{ + const char *abi; + + if (TARGET_FPU) + abi = "hard"; + else + abi = "soft"; + + return build_string_literal (strlen (abi) + 1, abi); +} + +/* Implement TARGET_D_REGISTER_CPU_TARGET_INFO. */ + +void +sparc_d_register_target_info (void) +{ + const struct d_target_info_spec handlers[] = { + { "floatAbi", sparc_d_handle_target_float_abi }, + { NULL, NULL }, + }; + + d_add_target_info_handlers (handlers); +} diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h index ef94d4fd893..ad875cc07f2 100644 --- a/gcc/config/sparc/sparc-protos.h +++ b/gcc/config/sparc/sparc-protos.h @@ -113,5 +113,6 @@ extern rtl_opt_pass *make_pass_work_around_errata (gcc::context *); /* Routines implemented in sparc-d.c */ extern void sparc_d_target_versions (void); +extern void sparc_d_register_target_info (void); #endif /* __SPARC_PROTOS_H__ */ diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index cec2f5a1207..48345753b6f 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -27,8 +27,9 @@ along with GCC; see the file COPYING3. If not see #define TARGET_CPU_CPP_BUILTINS() sparc_target_macros () -/* Target CPU versions for D. */ +/* Target hooks for D language. */ #define TARGET_D_CPU_VERSIONS sparc_d_target_versions +#define TARGET_D_REGISTER_CPU_TARGET_INFO sparc_d_register_target_info /* Specify this in a cover file to provide bi-architecture (32/64) support. */ /* #define SPARC_BI_ARCH */ diff --git a/gcc/d/d-target.cc b/gcc/d/d-target.cc index f1814df110d..d576b74af1c 100644 --- a/gcc/d/d-target.cc +++ b/gcc/d/d-target.cc @@ -198,6 +198,7 @@ Target::_init (const Param &) /* Initialize target info tables, the keys required by the language are added last, so that the OS and CPU handlers can override. */ + targetdm.d_register_cpu_target_info (); d_add_target_info_handlers (d_language_target_info); } diff --git a/gcc/d/d-target.def b/gcc/d/d-target.def index f79ffb9cd7d..cd0397c1577 100644 --- a/gcc/d/d-target.def +++ b/gcc/d/d-target.def @@ -46,6 +46,18 @@ relating to the target operating system.", void, (void), hook_void_void) +/* getTargetInfo keys relating to the target CPU. */ +DEFHOOK +(d_register_cpu_target_info, + "Register all target information keys relating to the target CPU using the\n\ +function @code{d_add_target_info_handlers}, which takes a\n\ +@samp{struct d_target_info_spec} (defined in @file{d/d-target.h}). The keys\n\ +added by this hook are made available at compile time by the\n\ +@code{__traits(getTargetInfo)} extension, the result is an expression\n\ +describing the requested target information.", + void, (void), + hook_void_void) + /* ModuleInfo section name and brackets. */ DEFHOOKPOD (d_minfo_section, diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 71607c4dc4e..6201df9a67d 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -10808,6 +10808,15 @@ Similarly to @code{TARGET_D_CPU_VERSIONS}, but is used for versions relating to the target operating system. @end deftypefn +@deftypefn {D Target Hook} void TARGET_D_REGISTER_CPU_TARGET_INFO (void) +Register all target information keys relating to the target CPU using the +function @code{d_add_target_info_handlers}, which takes a +@samp{struct d_target_info_spec} (defined in @file{d/d-target.h}). The keys +added by this hook are made available at compile time by the +@code{__traits(getTargetInfo)} extension, the result is an expression +describing the requested target information. +@end deftypefn + @deftypevr {D Target Hook} {const char *} TARGET_D_MINFO_SECTION Contains the name of the section in which module info references should be placed. This section is expected to be bracketed by two symbols to indicate diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index c8880dafcd4..bde57585b03 100644 --- a/gcc/doc/tm.texi.in +++ b/gcc/doc/tm.texi.in @@ -7357,6 +7357,8 @@ floating-point support; they are not included in this mechanism. @hook TARGET_D_OS_VERSIONS +@hook TARGET_D_REGISTER_CPU_TARGET_INFO + @hook TARGET_D_MINFO_SECTION @hook TARGET_D_MINFO_START_NAME