| Message ID | 20210215013337.3970-1-yunqiang.su@cipunited.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/2] MIPS: unaligned load: use SImode for SUBREG if OK (PR98996) | expand |
On 2/14/21 6:33 PM, YunQiang Su wrote: > It is found by ada s-pack96.adb ftbfs, due to 96bit load: 96 = 64 + 32. > While the 32bit pair of <load>l <load>r is mark as SUBREG, so they are > not in SImode, make it fail to find suitable insn. > > gcc/ChangeLog: > > * config/mips/mips.c (mips_expand_ext_as_unaligned_load): > If TARGET_64BIT and dest is SUBREG, we check the width, if it > equal to SImode, we use SImode operation, just like what we are > doing for REG one. > --- > gcc/ChangeLog | 8 ++++++++ > gcc/config/mips/mips.c | 2 +- > 2 files changed, 9 insertions(+), 1 deletion(-) > > diff --git a/gcc/ChangeLog b/gcc/ChangeLog > index ddf4c7f92d7..fb12eeb971d 100644 > --- a/gcc/ChangeLog > +++ b/gcc/ChangeLog > @@ -1,3 +1,11 @@ > +2021-02-15 YunQiang Su <yunqiang.su@cipunited.com> > + > + PR target/98996 > + * config/mips/mips.c (mips_expand_ext_as_unaligned_load): > + If TARGET_64BIT and dest is SUBREG, we check the width, if it > + equal to SImode, we use SImode operation, just like what we are > + doing for REG one. Do you need to do any checking on the contents of the SUBREG? ie, do you need to know if you've got (subreg (reg)) vs (subreg (mem)) Similarly I'd expect you may need to look at the mode of the inner object. You could have a true subreg (outer mode is smaller than inner mode), but you might also be able to have a paradoxical subreg (outer mode is larger than inner mode). Jeff
Jeff Law <law@redhat.com> 于2021年2月17日周三 上午3:16写道： > > > > On 2/14/21 6:33 PM, YunQiang Su wrote: > > It is found by ada s-pack96.adb ftbfs, due to 96bit load: 96 = 64 + 32. > > While the 32bit pair of <load>l <load>r is mark as SUBREG, so they are > > not in SImode, make it fail to find suitable insn. > > > > gcc/ChangeLog: > > > > * config/mips/mips.c (mips_expand_ext_as_unaligned_load): > > If TARGET_64BIT and dest is SUBREG, we check the width, if it > > equal to SImode, we use SImode operation, just like what we are > > doing for REG one. > > --- > > gcc/ChangeLog | 8 ++++++++ > > gcc/config/mips/mips.c | 2 +- > > 2 files changed, 9 insertions(+), 1 deletion(-) > > > > diff --git a/gcc/ChangeLog b/gcc/ChangeLog > > index ddf4c7f92d7..fb12eeb971d 100644 > > --- a/gcc/ChangeLog > > +++ b/gcc/ChangeLog > > @@ -1,3 +1,11 @@ > > +2021-02-15 YunQiang Su <yunqiang.su@cipunited.com> > > + > > + PR target/98996 > > + * config/mips/mips.c (mips_expand_ext_as_unaligned_load): > > + If TARGET_64BIT and dest is SUBREG, we check the width, if it > > + equal to SImode, we use SImode operation, just like what we are > > + doing for REG one. > Do you need to do any checking on the contents of the SUBREG? ie, do > you need to know if you've got (subreg (reg)) vs (subreg (mem)) > Yes. you are right, we'd better to check it. > Similarly I'd expect you may need to look at the mode of the inner > object. You could have a true subreg (outer mode is smaller than inner > mode), but you might also be able to have a paradoxical subreg (outer > mode is larger than inner mode). > I don't think that it is needed, since we we make sure that the mode of `dest' is DImode, and the width is SImode. > Jeff >
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ddf4c7f92d7..fb12eeb971d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2021-02-15 YunQiang Su <yunqiang.su@cipunited.com> + + PR target/98996 + * config/mips/mips.c (mips_expand_ext_as_unaligned_load): + If TARGET_64BIT and dest is SUBREG, we check the width, if it + equal to SImode, we use SImode operation, just like what we are + doing for REG one. + 2021-02-11 Eric Botcazou <ebotcazou@adacore.com> * config/i386/winnt.c (i386_pe_seh_unwind_emit): When switching to diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index ebb04b72b2b..b77604f935d 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -8400,7 +8400,7 @@ mips_expand_ext_as_unaligned_load (rtx dest, rtx src, HOST_WIDE_INT width, /* If TARGET_64BIT, the destination of a 32-bit "extz" or "extzv" will be a DImode, create a new temp and emit a zero extend at the end. */ if (GET_MODE (dest) == DImode - && REG_P (dest) + && (REG_P (dest) || SUBREG_P(dest)) && GET_MODE_BITSIZE (SImode) == width) { dest1 = dest;
It is found by ada s-pack96.adb ftbfs, due to 96bit load: 96 = 64 + 32. While the 32bit pair of <load>l <load>r is mark as SUBREG, so they are not in SImode, make it fail to find suitable insn. gcc/ChangeLog: * config/mips/mips.c (mips_expand_ext_as_unaligned_load): If TARGET_64BIT and dest is SUBREG, we check the width, if it equal to SImode, we use SImode operation, just like what we are doing for REG one. --- gcc/ChangeLog | 8 ++++++++ gcc/config/mips/mips.c | 2 +- 2 files changed, 9 insertions(+), 1 deletion(-)