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RISC-V: Shorten memrefs improvement, partial fix 97417.

Message ID 20210213202427.4855-1-jimw@sifive.com
State New
Headers show
Series RISC-V: Shorten memrefs improvement, partial fix 97417. | expand

Commit Message

Jim Wilson Feb. 13, 2021, 8:24 p.m. UTC 
We already have a check for riscv_shorten_memrefs in riscv_address_cost.
This adds the same check to riscv_rtx_costs.  Making this work also
requires a change to riscv_compressed_lw_address_p to work before reload
by checking the offset and assuming any pseudo reg is OK.  Testing shows
that this consistently gives small code size reductions.

Tested with riscv32-elf rv32imac/ilp32 and riscv64-linux rv64gc/lp64d
builds and checks and there were no regressions.

Committed.

	gcc/
	PR target/97417
	* config/riscv/riscv.c (riscv_compressed_lw_address_p): Drop early
	exit when !reload_completed.  Only perform check for compressed reg
	if reload_completed.
	(riscv_rtx_costs): In MEM case, when optimizing	for size and
	shorten memrefs, if not compressible, then increase cost.
---
 gcc/config/riscv/riscv.c | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)
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Patch

diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index ff41795a031..7d274596ba3 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -891,17 +891,13 @@  riscv_compressed_lw_address_p (rtx x)
   bool result = riscv_classify_address (&addr, x, GET_MODE (x),
 					reload_completed);
 
-  /* Before reload, assuming all load/stores of valid addresses get compressed
-     gives better code size than checking if the address is reg + small_offset
-     early on.  */
-  if (result && !reload_completed)
-    return true;
-
   /* Return false if address is not compressed_reg + small_offset.  */
   if (!result
       || addr.type != ADDRESS_REG
-      || (!riscv_compressed_reg_p (REGNO (addr.reg))
-	    && addr.reg != stack_pointer_rtx)
+      /* Before reload, assume all registers are OK.  */
+      || (reload_completed
+	  && !riscv_compressed_reg_p (REGNO (addr.reg))
+	  && addr.reg != stack_pointer_rtx)
       || !riscv_compressed_lw_offset_p (addr.offset))
     return false;
 
@@ -1708,6 +1704,13 @@  riscv_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UN
 	 instructions it needs.  */
       if ((cost = riscv_address_insns (XEXP (x, 0), mode, true)) > 0)
 	{
+	  /* When optimizing for size, make uncompressible 32-bit addresses
+	     more expensive so that compressible 32-bit addresses are
+	     preferred.  */
+	  if (TARGET_RVC && !speed && riscv_mshorten_memrefs && mode == SImode
+	      && !riscv_compressed_lw_address_p (XEXP (x, 0)))
+	    cost++;
+
 	  *total = COSTS_N_INSNS (cost + tune_param->memory_cost);
 	  return true;
 	}