diff mbox series

arm: Fix ICE with -fstack-protector -mpure-code [PR98998]

Message ID 20210212091043.GB4020736@tucnak
State New
Headers show
Series arm: Fix ICE with -fstack-protector -mpure-code [PR98998] | expand

Commit Message

Jakub Jelinek Feb. 12, 2021, 9:10 a.m. UTC 
Hi!

The vla15.C testcase ICEs with
-mcpu=cortex-m1 -mpure-code -fstack-protector -mthumb
as what force_const_mem returns (a SYMBOL_REF) is not a valid
memory address.
Previously the code was moving the address of the force_const_mem
into a register rather than the content of that MEM, so that instruction
must have been supported and loading from a MEM with a single REG base ought
to be valid too.

Bootstrapped/regtested on armv7hl-linux-gnueabi, ok for trunk?

No testcase, as I haven't figured out my way through gcc.target/arm, sorry.

2021-02-12  Jakub Jelinek  <jakub@redhat.com>

	PR target/98998
	* config/arm/arm.md (*stack_protect_combined_set_insn,
	*stack_protect_combined_test_insn): If force_const_mem result
	is not valid general operand, force its address into the destination
	register first.


	Jakub
diff mbox series

Patch

--- gcc/config/arm/arm.md.jj	2021-01-04 10:25:44.404170742 +0100
+++ gcc/config/arm/arm.md	2021-02-11 12:50:26.049604711 +0100
@@ -9216,6 +9216,11 @@  (define_insn_and_split "*stack_protect_c
       else
 	{
 	  rtx mem = force_const_mem (SImode, operands[1]);
+	  if (!general_operand (mem, SImode))
+	    {
+	      emit_move_insn (operands[2], XEXP (mem, 0));
+	      mem = replace_equiv_address (mem, operands[2], false);
+	    }
 	  emit_move_insn (operands[2], mem);
 	}
     }
@@ -9299,6 +9304,11 @@  (define_insn_and_split "*stack_protect_c
       else
 	{
 	  rtx mem = force_const_mem (SImode, operands[1]);
+	  if (!general_operand (mem, SImode))
+	    {
+	      emit_move_insn (operands[3], XEXP (mem, 0));
+	      mem = replace_equiv_address (mem, operands[3], false);
+	    }
 	  emit_move_insn (operands[3], mem);
 	}
     }