diff mbox series

[2/2] RISC-V: Add riscv{32,64}be with big endian as default

Message ID 20210125180230.5894-3-marcus@mc.pp.se
State New
Headers show
Series RISC-V big endian support | expand

Commit Message

Marcus Comstedt Jan. 25, 2021, 6:02 p.m. UTC 
gcc/
	* common/config/riscv/riscv-common.c
	(TARGET_DEFAULT_TARGET_FLAGS): Set default endianness.
	* config.gcc (riscv32be-*, riscv64be-*): Set
	TARGET_BIG_ENDIAN_DEFAULT to 1.
	* config/riscv/elf.h (LINK_SPEC): Change -melf* value
	depending on default endianness.
	* config/riscv/freebsd.h (LINK_SPEC): Likewise.
	* config/riscv/linux.h (LINK_SPEC): Likewise.
	* config/riscv/riscv.c (TARGET_DEFAULT_TARGET_FLAGS): Set
	default endianness.
	* config/riscv/riscv.h (DEFAULT_ENDIAN_SPEC): New macro.
---
 gcc/common/config/riscv/riscv-common.c |  5 +++++
 gcc/config.gcc                         | 15 +++++++++++++++
 gcc/config/riscv/elf.h                 |  2 +-
 gcc/config/riscv/freebsd.h             |  2 +-
 gcc/config/riscv/linux.h               |  2 +-
 gcc/config/riscv/riscv.c               |  5 +++++
 gcc/config/riscv/riscv.h               |  6 ++++++
 7 files changed, 34 insertions(+), 3 deletions(-)

Comments

Kito Cheng Jan. 29, 2021, 9:14 a.m. UTC | #1 
> diff --git a/gcc/config/riscv/elf.h b/gcc/config/riscv/elf.h
> index 973efdaed7b..7e65e499031 100644
> --- a/gcc/config/riscv/elf.h
> +++ b/gcc/config/riscv/elf.h
> @@ -18,7 +18,7 @@ along with GCC; see the file COPYING3.  If not see
>  <http://www.gnu.org/licenses/>.  */
>
>  #define LINK_SPEC "\
> --melf" XLEN_SPEC "lriscv \
> +-melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv \

Could you extract the endian related LINK_SPEC change to
ENDIAN_LINK_SPEC to riscv.h, so that we can prevent
duplicate this several times.



>  %{mno-relax:--no-relax} \
>  %{mbig-endian:-EB} \
>  %{mlittle-endian:-EL} \
> diff --git a/gcc/config/riscv/freebsd.h b/gcc/config/riscv/freebsd.h
> index f3aca9f7673..6018e7bb764 100644
> --- a/gcc/config/riscv/freebsd.h
> +++ b/gcc/config/riscv/freebsd.h
> @@ -40,7 +40,7 @@ along with GCC; see the file COPYING3.  If not see
>
>  #undef LINK_SPEC
>  #define LINK_SPEC "                                            \
> -  -melf" XLEN_SPEC "lriscv                                     \
> +  -melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv                  \
>    %{p:%nconsider using `-pg' instead of `-p' with gprof (1)}   \
>    %{v:-V}                                                      \
>    %{assert*} %{R*} %{rpath*} %{defsym*}                                \
> diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
> index e74f5d3f914..fce5b896e6e 100644
> --- a/gcc/config/riscv/linux.h
> +++ b/gcc/config/riscv/linux.h
> @@ -58,7 +58,7 @@ along with GCC; see the file COPYING3.  If not see
>    "%{mabi=ilp32:_ilp32}"
>
>  #define LINK_SPEC "\
> --melf" XLEN_SPEC "lriscv" LD_EMUL_SUFFIX " \
> +-melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv" LD_EMUL_SUFFIX " \
>  %{mno-relax:--no-relax} \
>  %{mbig-endian:-EB} \
>  %{mlittle-endian:-EL} \
> diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
> index ff41795a031..06f4739db79 100644
> --- a/gcc/config/riscv/riscv.c
> +++ b/gcc/config/riscv/riscv.c
> @@ -5499,6 +5499,11 @@ riscv_asan_shadow_offset (void)
>  #undef TARGET_ASAN_SHADOW_OFFSET
>  #define TARGET_ASAN_SHADOW_OFFSET riscv_asan_shadow_offset
>
> +#ifdef TARGET_BIG_ENDIAN_DEFAULT
> +#undef  TARGET_DEFAULT_TARGET_FLAGS
> +#define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_ENDIAN)
> +#endif
> +
>  struct gcc_target targetm = TARGET_INITIALIZER;
>
>  #include "gt-riscv.h"
> diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
> index 0b667d2e8b9..3cc3e864a3e 100644
> --- a/gcc/config/riscv/riscv.h
> +++ b/gcc/config/riscv/riscv.h
> @@ -30,6 +30,12 @@ along with GCC; see the file COPYING3.  If not see
>  /* Target CPU versions for D.  */
>  #define TARGET_D_CPU_VERSIONS riscv_d_target_versions
>
> +#ifdef TARGET_BIG_ENDIAN_DEFAULT
> +#define DEFAULT_ENDIAN_SPEC    "b"
> +#else
> +#define DEFAULT_ENDIAN_SPEC    "l"
> +#endif
> +
>  /* Default target_flags if no switches are specified  */
>
>  #ifndef TARGET_DEFAULT
> --
> 2.26.2
>
Marcus Comstedt Jan. 29, 2021, 8:01 p.m. UTC | #2 
Kito Cheng <kito.cheng@gmail.com> writes:

>> diff --git a/gcc/config/riscv/elf.h b/gcc/config/riscv/elf.h
>> index 973efdaed7b..7e65e499031 100644
>> --- a/gcc/config/riscv/elf.h
>> +++ b/gcc/config/riscv/elf.h
>> @@ -18,7 +18,7 @@ along with GCC; see the file COPYING3.  If not see
>>  <http://www.gnu.org/licenses/>.  */
>>
>>  #define LINK_SPEC "\
>> --melf" XLEN_SPEC "lriscv \
>> +-melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv \
>
> Could you extract the endian related LINK_SPEC change to
> ENDIAN_LINK_SPEC to riscv.h, so that we can prevent
> duplicate this several times.

You mean a define which expands to

  "-melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv"

?  Sure, but I don't think ENDIAN_LINK_SPEC would be a good name for
it since it defines the word size as well as the endianness, and also
ELF in general.

Maybe ELF_LINK_SPEC?  The word size and endianness are also ELF
properties (as encoded in EI_CLASS and EI_DATA).


  // Marcus
Kito Cheng Feb. 3, 2021, 6:12 a.m. UTC | #3 
> > Could you extract the endian related LINK_SPEC change to
> > ENDIAN_LINK_SPEC to riscv.h, so that we can prevent
> > duplicate this several times.
>
> You mean a define which expands to
>
>   "-melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv"

Yeah, but I'd like to include following 2 lines too:

%{mbig-endian:-EB} \
%{mlittle-endian:-EL} \

I saw it's just the same among 3 files.

>
> ?  Sure, but I don't think ENDIAN_LINK_SPEC would be a good name for
> it since it defines the word size as well as the endianness, and also
> ELF in general.
>
> Maybe ELF_LINK_SPEC?  The word size and endianness are also ELF
> properties (as encoded in EI_CLASS and EI_DATA).

Either ENDIAN_LINK_SPEC or ELF_LINK_SPEC is ok to me,
I don't have strong preference on nanming.

>
>
>   // Marcus
>
>
Marcus Comstedt Feb. 3, 2021, 6:19 p.m. UTC | #4 
Kito Cheng <kito.cheng@gmail.com> writes:

> Yeah, but I'd like to include following 2 lines too:
>
> %{mbig-endian:-EB} \
> %{mlittle-endian:-EL} \
>
> I saw it's just the same among 3 files.

Ah, I see.  Then it becomes a little more of a mixed grab bag.

I see that SuperH has a spec "subtarget_link_spec" which includes
-EL/-EB as well as other stuff, and then includes that into a
SH_LINK_SPEC, which also adds the link emulation as well as
e.g. mrelax.

Maybe we could take a page from their playbook but skip the extra
complexity, and just use "RISCV_LINK_SPEC" for the common stuff?

What about "%{mno-relax:--no-relax}"?  It's the same in linux.h and
elf.h, but missing from freebsd.h.  Intentional, or is this another
candidate for putting in the common define?


  // Marcus
Marcus Comstedt Feb. 7, 2021, 11:18 a.m. UTC | #5 
Hi again.

Sorry, but I just realized that the "-melf" part isn't the same in all
of {elf,linux,freebsd}.h; linux.h has a LD_EMUL_SUFFIX which the other
two are lacking.  Which means that the only truly common part is

  %{mbig-endian:-EB} \
  %{mlittle-endian:-EL} \

So is it worth a define to change two lines duplicated in three files
into one line duplicated in three files?  The define would not even
cover all of the endianness stuff.


  // Marcus
diff mbox series

Patch

diff --git a/gcc/common/config/riscv/riscv-common.c b/gcc/common/config/riscv/riscv-common.c
index b3f5c07c819..88c368f6c72 100644
--- a/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/common/config/riscv/riscv-common.c
@@ -32,6 +32,11 @@  along with GCC; see the file COPYING3.  If not see
 #include "config/riscv/riscv-protos.h"
 #include "config/riscv/riscv-subset.h"
 
+#ifdef  TARGET_BIG_ENDIAN_DEFAULT
+#undef  TARGET_DEFAULT_TARGET_FLAGS
+#define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_ENDIAN)
+#endif
+
 /* Type for implied ISA info.  */
 struct riscv_implied_info_t
 {
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 17fea83b2e4..ae47e430062 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2464,6 +2464,11 @@  riscv*-*-linux*)
 	tmake_file="${tmake_file} riscv/t-riscv riscv/t-linux"
 	gnu_ld=yes
 	gas=yes
+	case $target in
+	riscv32be-*|riscv64be-*)
+		tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
+		;;
+	esac
 	# Force .init_array support.  The configure script cannot always
 	# automatically detect that GAS supports it, yet we require it.
 	gcc_cv_initfini_array=yes
@@ -2487,6 +2492,11 @@  riscv*-*-elf* | riscv*-*-rtems*)
 	tmake_file="${tmake_file} riscv/t-riscv"
 	gnu_ld=yes
 	gas=yes
+	case $target in
+	riscv32be-*|riscv64be-*)
+		tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
+		;;
+	esac
 	# Force .init_array support.  The configure script cannot always
 	# automatically detect that GAS supports it, yet we require it.
 	gcc_cv_initfini_array=yes
@@ -2496,6 +2506,11 @@  riscv*-*-freebsd*)
 	tmake_file="${tmake_file} riscv/t-riscv"
 	gnu_ld=yes
 	gas=yes
+	case $target in
+	riscv32be-*|riscv64be-*)
+		tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
+		;;
+	esac
 	# Force .init_array support.  The configure script cannot always
 	# automatically detect that GAS supports it, yet we require it.
 	gcc_cv_initfini_array=yes
diff --git a/gcc/config/riscv/elf.h b/gcc/config/riscv/elf.h
index 973efdaed7b..7e65e499031 100644
--- a/gcc/config/riscv/elf.h
+++ b/gcc/config/riscv/elf.h
@@ -18,7 +18,7 @@  along with GCC; see the file COPYING3.  If not see
 <http://www.gnu.org/licenses/>.  */
 
 #define LINK_SPEC "\
--melf" XLEN_SPEC "lriscv \
+-melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv \
 %{mno-relax:--no-relax} \
 %{mbig-endian:-EB} \
 %{mlittle-endian:-EL} \
diff --git a/gcc/config/riscv/freebsd.h b/gcc/config/riscv/freebsd.h
index f3aca9f7673..6018e7bb764 100644
--- a/gcc/config/riscv/freebsd.h
+++ b/gcc/config/riscv/freebsd.h
@@ -40,7 +40,7 @@  along with GCC; see the file COPYING3.  If not see
 
 #undef LINK_SPEC
 #define LINK_SPEC "						\
-  -melf" XLEN_SPEC "lriscv					\
+  -melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv			\
   %{p:%nconsider using `-pg' instead of `-p' with gprof (1)}	\
   %{v:-V}							\
   %{assert*} %{R*} %{rpath*} %{defsym*}				\
diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
index e74f5d3f914..fce5b896e6e 100644
--- a/gcc/config/riscv/linux.h
+++ b/gcc/config/riscv/linux.h
@@ -58,7 +58,7 @@  along with GCC; see the file COPYING3.  If not see
   "%{mabi=ilp32:_ilp32}"
 
 #define LINK_SPEC "\
--melf" XLEN_SPEC "lriscv" LD_EMUL_SUFFIX " \
+-melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv" LD_EMUL_SUFFIX " \
 %{mno-relax:--no-relax} \
 %{mbig-endian:-EB} \
 %{mlittle-endian:-EL} \
diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index ff41795a031..06f4739db79 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -5499,6 +5499,11 @@  riscv_asan_shadow_offset (void)
 #undef TARGET_ASAN_SHADOW_OFFSET
 #define TARGET_ASAN_SHADOW_OFFSET riscv_asan_shadow_offset
 
+#ifdef TARGET_BIG_ENDIAN_DEFAULT
+#undef  TARGET_DEFAULT_TARGET_FLAGS
+#define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_ENDIAN)
+#endif
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 #include "gt-riscv.h"
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index 0b667d2e8b9..3cc3e864a3e 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -30,6 +30,12 @@  along with GCC; see the file COPYING3.  If not see
 /* Target CPU versions for D.  */
 #define TARGET_D_CPU_VERSIONS riscv_d_target_versions
 
+#ifdef TARGET_BIG_ENDIAN_DEFAULT
+#define DEFAULT_ENDIAN_SPEC    "b"
+#else
+#define DEFAULT_ENDIAN_SPEC    "l"
+#endif
+
 /* Default target_flags if no switches are specified  */
 
 #ifndef TARGET_DEFAULT