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Date: Thu, 12 Nov 2020 20:31:10 +0100 (CET)
From: Gerald Pfeifer
To: gcc-patches@gcc.gnu.org, "Liu, Hongtao"
Subject: [committed] wwwdocs: Editorial changes around x86-64 ISA
extensions
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Per our discussion on the list (plus a grammer improvement in a
section above).
One question: why are the ISA extension lists not alphabetically
sorted? Wouldn't that be beneficial for users? Easier to find
something and also easier to compare?
Gerald
---
htdocs/gcc-11/changes.html | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/htdocs/gcc-11/changes.html b/htdocs/gcc-11/changes.html
index fc4c74f4..106db8e9 100644
--- a/htdocs/gcc-11/changes.html
+++ b/htdocs/gcc-11/changes.html
@@ -265,7 +265,8 @@ a work-in-progress.
New ISA extension support for Intel AMX-TILE, AMX-INT8, AMX-BF16 was
added to GCC. AMX-TILE, AMX-INT8, AMX-BF16 intrinsics are available
- via the -mamx-tile, -mamx-int8, -mamx-bf16
compiler switch.
+ via the -mamx-tile, -mamx-int8, -mamx-bf16
compiler
+ switches.
New ISA extension support for Intel AVX-VNNI was added to GCC.
AVX-VNNI intrinsics are available via the -mavxvnni
@@ -273,14 +274,14 @@ a work-in-progress.
GCC now supports the Intel CPU named Sapphire Rapids through
-march=sapphirerapids
.
- The switch enables the MOVDIRI MOVDIR64B AVX512VP2INTERSECT ENQCMD CLDEMOTE
- SERIALIZE PTWRITE WAITPKG TSXLDTRK AMT-TILE AMX-INT8 AMX-BF16 AVX-VNNI
- ISA extensions.
+ The switch enables the MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, ENQCMD,
+ CLDEMOTE, SERIALIZE, PTWRITE, WAITPKG, TSXLDTRK, AMT-TILE, AMX-INT8,
+ AMX-BF16, and AVX-VNNI ISA extensions.
GCC now supports the Intel CPU named Alderlake through
-march=alderlake
.
- The switch enables the CLDEMOTE PTWRITE WAITPKG SERIALIZE KEYLOCKER AVX-VNNI
- HRESET ISA extensions.
+ The switch enables the CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, KEYLOCKER,
+ AVX-VNNI, and HRESET ISA extensions.