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DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2020 11:34:42.3409 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b96e9340-1869-4b7a-b728-08d865fdfd53 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT021.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR08MB4337 X-Spam-Status: No, score=-14.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, MSGID_FROM_MTA_HEADER, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Alex Coplan via Gcc-patches From: Alex Coplan Reply-To: Alex Coplan Cc: Richard Earnshaw , Ramana Radhakrishnan Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" This patch moves the recent entry for Neoverse N2 down and adds a comment in order to preserve the existing order/structure in arm-cpus.in. Bootstrapped and tested on arm-linux-gnueabihf. Committing as obvious. Alex --- gcc/ChangeLog: * config/arm/arm-cpus.in: Fix ordering, move Neoverse N2 down. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm-tune.md: Regenerate. diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index d47f9439ed1..9abb59a00ba 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -1492,17 +1492,6 @@ begin cpu neoverse-n1 part d0c end cpu neoverse-n1 -begin cpu neoverse-n2 - cname neoversen2 - tune for cortex-a57 - tune flags LDSCHED - architecture armv8.5-a+fp16+bf16+i8mm - option crypto add FP_ARMv8 CRYPTO - costs cortex_a57 - vendor 41 - part 0xd49 -end cpu neoverse-n2 - # ARMv8.2 A-profile ARM DynamIQ big.LITTLE implementations begin cpu cortex-a75.cortex-a55 cname cortexa75cortexa55 @@ -1532,6 +1521,18 @@ begin cpu neoverse-v1 costs cortex_a57 end cpu neoverse-v1 +# Armv8.5 A-profile Architecture Processors +begin cpu neoverse-n2 + cname neoversen2 + tune for cortex-a57 + tune flags LDSCHED + architecture armv8.5-a+fp16+bf16+i8mm + option crypto add FP_ARMv8 CRYPTO + costs cortex_a57 + vendor 41 + part 0xd49 +end cpu neoverse-n2 + # V8 M-profile implementations. begin cpu cortex-m23 cname cortexm23 diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index 9f658244053..05f5c08400b 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -252,9 +252,6 @@ Enum(processor_type) String(cortex-x1) Value( TARGET_CPU_cortexx1) EnumValue Enum(processor_type) String(neoverse-n1) Value( TARGET_CPU_neoversen1) -EnumValue -Enum(processor_type) String(neoverse-n2) Value( TARGET_CPU_neoversen2) - EnumValue Enum(processor_type) String(cortex-a75.cortex-a55) Value( TARGET_CPU_cortexa75cortexa55) @@ -264,6 +261,9 @@ Enum(processor_type) String(cortex-a76.cortex-a55) Value( TARGET_CPU_cortexa76co EnumValue Enum(processor_type) String(neoverse-v1) Value( TARGET_CPU_neoversev1) +EnumValue +Enum(processor_type) String(neoverse-n2) Value( TARGET_CPU_neoversen2) + EnumValue Enum(processor_type) String(cortex-m23) Value( TARGET_CPU_cortexm23) diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md index 269e627626a..32657da48a5 100644 --- a/gcc/config/arm/arm-tune.md +++ b/gcc/config/arm/arm-tune.md @@ -46,8 +46,8 @@ (define_attr "tune" cortexa73cortexa53,cortexa55,cortexa75, cortexa76,cortexa76ae,cortexa77, cortexa78,cortexa78ae,cortexx1, - neoversen1,neoversen2,cortexa75cortexa55, - cortexa76cortexa55,neoversev1,cortexm23, + neoversen1,cortexa75cortexa55,cortexa76cortexa55, + neoversev1,neoversen2,cortexm23, cortexm33,cortexm35p,cortexm55, cortexr52" (const (symbol_ref "((enum attr_tune) arm_tune)")))