diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
new file mode 100644
index 0000000..053ca32
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target dfp } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   _Decimal64 type.  */
+
+#define TYPE _Decimal64
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c
new file mode 100644
index 0000000..b7fd84e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   double type.  */
+
+#define TYPE double
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c
new file mode 100644
index 0000000..90081e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   long long type.  */
+
+#define TYPE long long
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c
new file mode 100644
index 0000000..71357b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   short type.  */
+
+#define TYPE short
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplh[az]\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M}     2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c
new file mode 100644
index 0000000..497bdd6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target float128 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   _Float128 type.  */
+
+#define TYPE _Float128
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c
new file mode 100644
index 0000000..472360c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   signed char type.  */
+
+#define TYPE signed char
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M}  2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c
new file mode 100644
index 0000000..7ab07ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target dfp } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   _Decimal32 type.  Note, the _Decimal32 type will not generate any prefixed
+   load or stores, because there is no prefixed load/store instruction to load
+   up a vector register as a zero extended 32-bit integer.  So we count the
+   number of load addresses that are generated.  */
+
+#define TYPE _Decimal32
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpla\M}  3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c
new file mode 100644
index 0000000..0e907e0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   float type.  */
+
+#define TYPE float
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfs\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c
new file mode 100644
index 0000000..fb90fcd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   int type.  */
+
+#define TYPE int
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplw[az]\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M}     2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c
new file mode 100644
index 0000000..940040f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   unsigned long long type.  */
+
+#define TYPE unsigned long long
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c
new file mode 100644
index 0000000..5c8d082
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   unsigned short type.  */
+
+#define TYPE unsigned short
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplhz\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M}  2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c
new file mode 100644
index 0000000..6899919
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   unsigned char type.  */
+
+#define TYPE unsigned char
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M}  2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c
new file mode 100644
index 0000000..5948f82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   unsigned int type.  */
+
+#define TYPE unsigned int
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplwz\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M}  2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c
new file mode 100644
index 0000000..d626b8a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+   vector double type.  */
+
+#define TYPE vector double
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h
new file mode 100644
index 0000000..26175dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h
@@ -0,0 +1,41 @@
+/* Common tests for prefixed instructions testing whether pc-relative prefixed
+   instructions are generated for each type.  */
+
+#ifndef TYPE
+#define TYPE unsigned int
+#endif
+
+static TYPE a;
+
+/* Make sure a is not optimized away.  */
+TYPE *p = &a;
+
+#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET)
+#define DO_ADD		1
+#define DO_VALUE	1
+#define DO_SET		1
+#endif
+
+#if DO_ADD
+void
+add (TYPE b)
+{
+  a += b;
+}
+#endif
+
+#if DO_VALUE
+TYPE
+value (void)
+{
+  return a;
+}
+#endif
+
+#if DO_SET
+void
+set (TYPE b)
+{
+  a = b;
+}
+#endif
