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Thu, 04 Jun 2020 17:03:55 +0000 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 054H3stx50594146 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 4 Jun 2020 17:03:54 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7917CAC065; Thu, 4 Jun 2020 17:03:54 +0000 (GMT) Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C63AFAC05F; Thu, 4 Jun 2020 17:03:53 +0000 (GMT) Received: from ibm-tinman.the-meissners.org (unknown [9.211.67.77]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTPS; Thu, 4 Jun 2020 17:03:53 +0000 (GMT) Date: Thu, 4 Jun 2020 13:03:51 -0400 To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , David Edelsohn Subject: [PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets Message-ID: <20200604170351.GA25602@ibm-tinman.the-meissners.org> Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , David Edelsohn References: <1591041222-24243-1-git-send-email-meissner@linux.ibm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1591041222-24243-1-git-send-email-meissner@linux.ibm.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-06-04_11:2020-06-04, 2020-06-04 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxscore=0 phishscore=0 suspectscore=0 spamscore=0 cotscore=-2147483648 clxscore=1015 bulkscore=0 mlxlogscore=999 impostorscore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2004280000 definitions=main-2006040114 X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Michael Meissner via Gcc-patches From: Michael Meissner Reply-To: Michael Meissner Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" [PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets Add tests to make sure for -mcpu=future that prefixed load/store instructions are generated if the offset is larger than 16 bits. The only difference is I reworded the comments, based on a suggestion by Will Schmidt. 2020-06-04 Michael Meissner * gcc.target/powerpc/prefix-large-dd.c: New test. * gcc.target/powerpc/prefix-large-df.c: New test. * gcc.target/powerpc/prefix-large-di.c: New test. * gcc.target/powerpc/prefix-large-hi.c: New test. * gcc.target/powerpc/prefix-large-kf.c: New test. * gcc.target/powerpc/prefix-large-qi.c: New test. * gcc.target/powerpc/prefix-large-sd.c: New test. * gcc.target/powerpc/prefix-large-sf.c: New test. * gcc.target/powerpc/prefix-large-si.c: New test. * gcc.target/powerpc/prefix-large-udi.c: New test. * gcc.target/powerpc/prefix-large-uhi.c: New test. * gcc.target/powerpc/prefix-large-uqi.c: New test. * gcc.target/powerpc/prefix-large-usi.c: New test. * gcc.target/powerpc/prefix-large-v2df.c: New test. * gcc.target/powerpc/prefix-large.h: Include file for new tests. --- gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c | 13 +++++++ gcc/testsuite/gcc.target/powerpc/prefix-large-df.c | 13 +++++++ gcc/testsuite/gcc.target/powerpc/prefix-large-di.c | 14 ++++++++ gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c | 13 +++++++ gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c | 13 +++++++ gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c | 13 +++++++ gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c | 19 ++++++++++ gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c | 13 +++++++ gcc/testsuite/gcc.target/powerpc/prefix-large-si.c | 13 +++++++ .../gcc.target/powerpc/prefix-large-udi.c | 14 ++++++++ .../gcc.target/powerpc/prefix-large-uhi.c | 13 +++++++ .../gcc.target/powerpc/prefix-large-uqi.c | 13 +++++++ .../gcc.target/powerpc/prefix-large-usi.c | 13 +++++++ .../gcc.target/powerpc/prefix-large-v2df.c | 13 +++++++ gcc/testsuite/gcc.target/powerpc/prefix-large.h | 40 ++++++++++++++++++++++ 15 files changed, 230 insertions(+) create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-df.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-di.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-si.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large.h diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c new file mode 100644 index 0000000..81cfe77 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the _Decimal64 type. */ + +#define TYPE _Decimal64 + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c new file mode 100644 index 0000000..b0794dc --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the double type. */ + +#define TYPE double + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c new file mode 100644 index 0000000..d4fcfed --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the long long type. */ + +#define TYPE long long + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c new file mode 100644 index 0000000..f2ebeb1 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the short type. */ + +#define TYPE short + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplh[az]\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c new file mode 100644 index 0000000..f4da747 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the _Float128 type. */ + +#define TYPE _Float128 + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c new file mode 100644 index 0000000..18bc5a8 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the signed char type. */ + +#define TYPE signed char + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c new file mode 100644 index 0000000..070befa --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the _Decimal32 type. Note, the _Decimal32 type will not generate any + prefixed load or stores, because there is no prefixed load/store instruction + to load up a vector register as a zero extended 32-bit integer. So we count + the number of load addresses that are generated. */ + +#define TYPE _Decimal32 + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mpaddi\M|\mpli|\mpla\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mlfiwzx\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mstfiwx\M} 2 } } */ + + diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c new file mode 100644 index 0000000..62add3c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the float type. */ + +#define TYPE float + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplfs\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c new file mode 100644 index 0000000..55ba75e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the _Decimal64 type. */ + +#define TYPE int + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplw[az]\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c new file mode 100644 index 0000000..d800f5c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the unsigned long long type. */ + +#define TYPE unsigned long long + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c new file mode 100644 index 0000000..e24d9cf --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the unsigned short type. */ + +#define TYPE unsigned short + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplhz\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c new file mode 100644 index 0000000..4a6df16 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the unsigned char type. */ + +#define TYPE unsigned char + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c new file mode 100644 index 0000000..e79761f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the unsigned int type. */ + +#define TYPE unsigned int + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c new file mode 100644 index 0000000..3e82522 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests whether prefixed instructions with large numeric offsets are generated + for the vector double type. */ + +#define TYPE vector double + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large.h b/gcc/testsuite/gcc.target/powerpc/prefix-large.h new file mode 100644 index 0000000..07b38ae --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/prefix-large.h @@ -0,0 +1,40 @@ +/* Common tests for prefixed instructions testing whether we can generate a + 34-bit offset using 1 instruction. */ + +#ifndef TYPE +#define TYPE unsigned int +#endif + +#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET) +#define DO_ADD 1 +#define DO_VALUE 1 +#define DO_SET 1 +#endif + +#ifndef CONSTANT +#define CONSTANT 0x12480UL +#endif + +#if DO_ADD +void +add (TYPE *p, TYPE a) +{ + p[CONSTANT] += a; +} +#endif + +#if DO_VALUE +TYPE +value (TYPE *p) +{ + return p[CONSTANT]; +} +#endif + +#if DO_SET +void +set (TYPE *p, TYPE a) +{ + p[CONSTANT] = a; +} +#endif