diff mbox series

[5/7,V2] PowerPC tests: Prefixed insn with large offsets

Message ID 20200604170351.GA25602@ibm-tinman.the-meissners.org
State New
Headers show
Series None | expand

Commit Message

Michael Meissner June 4, 2020, 5:03 p.m. UTC 
[PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets

Add tests to make sure for -mcpu=future that prefixed load/store instructions
are generated if the offset is larger than 16 bits.  The only difference
is I reworded the comments, based on a suggestion by Will Schmidt.

2020-06-04  Michael Meissner  <meissner@linux.ibm.com>

	* gcc.target/powerpc/prefix-large-dd.c: New test.
	* gcc.target/powerpc/prefix-large-df.c: New test.
	* gcc.target/powerpc/prefix-large-di.c: New test.
	* gcc.target/powerpc/prefix-large-hi.c: New test.
	* gcc.target/powerpc/prefix-large-kf.c: New test.
	* gcc.target/powerpc/prefix-large-qi.c: New test.
	* gcc.target/powerpc/prefix-large-sd.c: New test.
	* gcc.target/powerpc/prefix-large-sf.c: New test.
	* gcc.target/powerpc/prefix-large-si.c: New test.
	* gcc.target/powerpc/prefix-large-udi.c: New test.
	* gcc.target/powerpc/prefix-large-uhi.c: New test.
	* gcc.target/powerpc/prefix-large-uqi.c: New test.
	* gcc.target/powerpc/prefix-large-usi.c: New test.
	* gcc.target/powerpc/prefix-large-v2df.c: New test.
	* gcc.target/powerpc/prefix-large.h: Include file for new tests.
---
 gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c | 13 +++++++
 gcc/testsuite/gcc.target/powerpc/prefix-large-df.c | 13 +++++++
 gcc/testsuite/gcc.target/powerpc/prefix-large-di.c | 14 ++++++++
 gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c | 13 +++++++
 gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c | 13 +++++++
 gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c | 13 +++++++
 gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c | 19 ++++++++++
 gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c | 13 +++++++
 gcc/testsuite/gcc.target/powerpc/prefix-large-si.c | 13 +++++++
 .../gcc.target/powerpc/prefix-large-udi.c          | 14 ++++++++
 .../gcc.target/powerpc/prefix-large-uhi.c          | 13 +++++++
 .../gcc.target/powerpc/prefix-large-uqi.c          | 13 +++++++
 .../gcc.target/powerpc/prefix-large-usi.c          | 13 +++++++
 .../gcc.target/powerpc/prefix-large-v2df.c         | 13 +++++++
 gcc/testsuite/gcc.target/powerpc/prefix-large.h    | 40 ++++++++++++++++++++++
 15 files changed, 230 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-df.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-di.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-si.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large.h

Comments

Segher Boessenkool June 25, 2020, 5:09 p.m. UTC | #1 
Hi!

On Thu, Jun 04, 2020 at 01:03:51PM -0400, Michael Meissner wrote:
> [PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets
> 
> Add tests to make sure for -mcpu=future that prefixed load/store instructions
> are generated if the offset is larger than 16 bits.  The only difference
> is I reworded the comments, based on a suggestion by Will Schmidt.

That is the difference to v1?  Please mark this up clearly -- there are
many examples of how you can do this, on the GCC lists even.

> +/* { dg-final { scan-assembler-times {\mpaddi\M|\mpli|\mpla\M} 3 } } */

Is there are reason you don't have \M on pli, or is that an oversight?

Okay for trunk with that looked at, and the necessary "no future"
changes (and retesting ofc).  Thanks!


Segher
Michael Meissner June 27, 2020, 5:55 a.m. UTC | #2 
On Thu, Jun 25, 2020 at 12:09:41PM -0500, Segher Boessenkool wrote:
> Hi!
> 
> On Thu, Jun 04, 2020 at 01:03:51PM -0400, Michael Meissner wrote:
> > [PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets
> > 
> > Add tests to make sure for -mcpu=future that prefixed load/store instructions
> > are generated if the offset is larger than 16 bits.  The only difference
> > is I reworded the comments, based on a suggestion by Will Schmidt.
> 
> That is the difference to v1?  Please mark this up clearly -- there are
> many examples of how you can do this, on the GCC lists even.
> 
> > +/* { dg-final { scan-assembler-times {\mpaddi\M|\mpli|\mpla\M} 3 } } */
> 
> Is there are reason you don't have \M on pli, or is that an oversight?

Just an oversight.

> Okay for trunk with that looked at, and the necessary "no future"
> changes (and retesting ofc).  Thanks!

I simplified the test to use just the instruction (PLI) that is currently
generated.  I was just trying to be general to accomidate possible future code
generation changes (i.e. instead of loading up the offset with PLI, we could
potentionally do a PADDI to the base register that was loaded), but we can
change the test if/when we change the compiler.

The test in question was for loading up _Decimal32, which we don't have a
D*-form instruction that we can use, and we must always do an X-form
instruction to load up the 32-bit value into the vector register.
Segher Boessenkool June 27, 2020, 6:53 p.m. UTC | #3 
On Sat, Jun 27, 2020 at 01:55:19AM -0400, Michael Meissner wrote:
> On Thu, Jun 25, 2020 at 12:09:41PM -0500, Segher Boessenkool wrote:
> > On Thu, Jun 04, 2020 at 01:03:51PM -0400, Michael Meissner wrote:
> > > +/* { dg-final { scan-assembler-times {\mpaddi\M|\mpli|\mpla\M} 3 } } */
> > 
> > Is there are reason you don't have \M on pli, or is that an oversight?
> 
> Just an oversight.
> 
> > Okay for trunk with that looked at, and the necessary "no future"
> > changes (and retesting ofc).  Thanks!
> 
> I simplified the test to use just the instruction (PLI) that is currently
> generated.  I was just trying to be general to accomidate possible future code
> generation changes (i.e. instead of loading up the offset with PLI, we could
> potentionally do a PADDI to the base register that was loaded), but we can
> change the test if/when we change the compiler.

That is a good idea, yes.  But, please post what you committed, then?


Segher
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c
new file mode 100644
index 0000000..81cfe77
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the _Decimal64 type.  */
+
+#define TYPE _Decimal64
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c
new file mode 100644
index 0000000..b0794dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the double type.  */
+
+#define TYPE double
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c
new file mode 100644
index 0000000..d4fcfed
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c
@@ -0,0 +1,14 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the long long type.  */
+
+#define TYPE long long
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c
new file mode 100644
index 0000000..f2ebeb1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the short type.  */
+
+#define TYPE short
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplh[az]\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M}     2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c
new file mode 100644
index 0000000..f4da747
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the _Float128 type.  */
+
+#define TYPE _Float128
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c
new file mode 100644
index 0000000..18bc5a8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the signed char type.  */
+
+#define TYPE signed char
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M}  2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c
new file mode 100644
index 0000000..070befa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c
@@ -0,0 +1,19 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the _Decimal32 type.  Note, the _Decimal32 type will not generate any
+   prefixed load or stores, because there is no prefixed load/store instruction
+   to load up a vector register as a zero extended 32-bit integer.  So we count
+   the number of load addresses that are generated.  */
+
+#define TYPE _Decimal32
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpaddi\M|\mpli|\mpla\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mlfiwzx\M}              2 } } */
+/* { dg-final { scan-assembler-times {\mstfiwx\M}              2 } } */
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c
new file mode 100644
index 0000000..62add3c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the float type.  */
+
+#define TYPE float
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfs\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c
new file mode 100644
index 0000000..55ba75e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the _Decimal64 type.  */
+
+#define TYPE int
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplw[az]\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M}     2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c
new file mode 100644
index 0000000..d800f5c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c
@@ -0,0 +1,14 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the unsigned long long type.  */
+
+#define TYPE unsigned long long
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c
new file mode 100644
index 0000000..e24d9cf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the unsigned short type.  */
+
+#define TYPE unsigned short
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplhz\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M}  2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c
new file mode 100644
index 0000000..4a6df16
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the unsigned char type.  */
+
+#define TYPE unsigned char
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M}  2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c
new file mode 100644
index 0000000..e79761f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the unsigned int type.  */
+
+#define TYPE unsigned int
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplwz\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M}  2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c
new file mode 100644
index 0000000..3e82522
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+   for the vector double type.  */
+
+#define TYPE vector double
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large.h b/gcc/testsuite/gcc.target/powerpc/prefix-large.h
new file mode 100644
index 0000000..07b38ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large.h
@@ -0,0 +1,40 @@ 
+/* Common tests for prefixed instructions testing whether we can generate a
+   34-bit offset using 1 instruction.  */
+
+#ifndef TYPE
+#define TYPE unsigned int
+#endif
+
+#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET)
+#define DO_ADD		1
+#define DO_VALUE	1
+#define DO_SET		1
+#endif
+
+#ifndef CONSTANT
+#define CONSTANT	0x12480UL
+#endif
+
+#if DO_ADD
+void
+add (TYPE *p, TYPE a)
+{
+  p[CONSTANT] += a;
+}
+#endif
+
+#if DO_VALUE
+TYPE
+value (TYPE *p)
+{
+  return p[CONSTANT];
+}
+#endif
+
+#if DO_SET
+void
+set (TYPE *p, TYPE a)
+{
+  p[CONSTANT] = a;
+}
+#endif