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Tue, 28 Apr 2020 11:30:36 -0700 (PDT) Received: from bell-sw.com ([85.143.156.239]) by smtp.gmail.com with ESMTPSA id h28sm30161lfe.80.2020.04.28.11.30.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 28 Apr 2020 11:30:34 -0700 (PDT) Date: Tue, 28 Apr 2020 21:30:33 +0300 From: Anton Youdkevitch To: gcc-patches@gcc.gnu.org Subject: [PATCH] wwwdocs: Added mentioning of TX3 chip to the list of the processors Message-ID: <20200428183032.GB29652@bell-sw.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.24 (2015-08-30) X-Spam-Status: No, score=-24.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_SOFTFAIL, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: joseph@codesourcery.com Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" This adds mentioning of Marvell ThunderX3 chip to the list of supported processors. --- htdocs/gcc-10/changes.html | 1 + 1 file changed, 1 insertion(+) diff --git a/htdocs/gcc-10/changes.html b/htdocs/gcc-10/changes.html index 41c2dc0..b37b74d 100644 --- a/htdocs/gcc-10/changes.html +++ b/htdocs/gcc-10/changes.html @@ -655,6 +655,7 @@ typedef svbool_t pred512 __attribute__((arm_sve_vector_bits(512)));
  • Arm Cortex-A65 (cortex-a65).
  • Arm Cortex-A65AE (cortex-a65ae).
  • Arm Cortex-A34 (cortex-a34).
    • +
  • Marvell ThunderX3 (thunderx3t110).
    • The GCC identifiers can be used as arguments to the -mcpu or -mtune options,