diff mbox series

V12 patch #1 of 14, add gcc_asserts for rs6000_adjust_vec_address

Message ID 20200109235205.GA30103@ibm-toto.the-meissners.org
State New
Headers show
Series V12 patch #1 of 14, add gcc_asserts for rs6000_adjust_vec_address | expand

Commit Message

Michael Meissner Jan. 9, 2020, 11:52 p.m. UTC 
In https://gcc.gnu.org/ml/gcc-patches/2019-12/msg01530.html, Segher asked me to
do the gcc_asserts as early as possible.

This patch makes sure the base register temporary is not used in the other
arguments.

I have built and bootstrapped a compiler on a little endian power8 system, and
there were no regressions in the test.  In addition, I compiled both Spec 2006
and Spec 2017 benchmarks with this compiler and I saw new build failures.  Can
I check this into the trunk?

2020-01-09  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
	gcc_asserts.

Comments

Segher Boessenkool Jan. 31, 2020, 2:35 p.m. UTC | #1 
Hi!

On Thu, Jan 09, 2020 at 06:52:05PM -0500, Michael Meissner wrote:
> 2020-01-09  Michael Meissner  <meissner@linux.ibm.com>
> 
> 	* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
> 	gcc_asserts.

> +      /* All insns should use the 'Q' constraint (address is a single register)
> +	 if the element number is not a constant.  */
> +      gcc_assert (REG_P (addr) || SUBREG_P (addr));

So maybe you should just more directly say

  gcc_assert (satisfies_constraint_Q (addr));

?  The Q constraint does not allow subregs, btw, is that an oversight?

Okay for trunk either way.  Thanks!


Segher
diff mbox series

Patch

--- /tmp/kXfaUP_rs6000.c	2020-01-08 13:59:48.664454496 -0500
+++ gcc/config/rs6000/rs6000.c	2020-01-08 13:59:45.593410764 -0500
@@ -6772,6 +6772,9 @@  rs6000_adjust_vec_address (rtx scalar_re
   rtx new_addr;
   bool valid_addr_p;
 
+  gcc_assert (!reg_mentioned_p (base_tmp, addr));
+  gcc_assert (!reg_mentioned_p (base_tmp, element));
+
   /* Vector addresses should not have PRE_INC, PRE_DEC, or PRE_MODIFY.  */
   gcc_assert (GET_RTX_CLASS (GET_CODE (addr)) != RTX_AUTOINC);
 
@@ -6781,6 +6784,10 @@  rs6000_adjust_vec_address (rtx scalar_re
     element_offset = GEN_INT (INTVAL (element) * scalar_size);
   else
     {
+      /* All insns should use the 'Q' constraint (address is a single register)
+	 if the element number is not a constant.  */
+      gcc_assert (REG_P (addr) || SUBREG_P (addr));
+
       int byte_shift = exact_log2 (scalar_size);
       gcc_assert (byte_shift >= 0);